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TLV62130A: TLV62130A output accuracy in VOUT < VIN + 1V

Iwata Etsuji
Expert 6380 points
Part Number: TLV62130A

Hello team,

We can see the accuracy specification of TLV62130A in the condition; VOUT > VIN + 1V.
How much(%) the accuracy could be changed in VIN < VOUT < VIN + 1V case? (e.g. when setting VOUT=3.3V, how much the accuracy change in VIN < 4.3V?)

Best regards,
Iwata Etsuji

  • 0
    TI__Guru**** 191445 points

    Iwata-san,

    In the case where Vin < Vout + 1V, the TLV62130A may be operating in 100% duty cycle mode.  The exact boundary is described in the datasheet section 8.4.3.

    In 100% duty cycle operation, the TLV62130A is not strictly regulating.  The output voltage will be Vin - Iout * (RDSon + Rdc), where Rdc is the inductor series resistance.

  • 0 in reply to JohnTucker
    TI__Expert 6380 points

    Hi John-san,

    Thank you for your support.

    Sorry, I could not see the exact boundary condition for 100% duty cycle mode.
    Regarding 100% duty mode where Vin < Vout + 1V, is it contradiction to Fig.21 of the data sheet?

    Best regards,
    Iwata Etsuji

  • 0 in reply to Iwata Etsuji
    TI__Guru**** 191445 points

    In figure 21 of the data sheet, the lowest input voltage is 4 V.  At no load, that corresponds to 3.3 / 4 = 82.5% duty cycle.  As vin is lowered towards Vout, that duty cycle will increase.  The duty cycle also incrementally increases as the load current increases:

    D = Vout / (Vin - Iout * (RDSon + RDCL))

    So the input voltage and output current where Vout = Vin - Iout * (RDSon + RDCL) results in 100 % duty cycle.  As Vin is decreased and/or Iout increased further, the duty cycle cannot increase so the output voltage will fall out of regulation.  Beyond that point, the output voltage will just be the input voltage minus the I*R losses in the circuit.

  • 0 in reply to JohnTucker
    TI__Expert 6380 points

    Hi John-san,

    Thank you for your support.

    I would like to confirm your comments mean the followings.

    When 0.8V (1+R1/R2) / (Vin - Iout (RDSon + RDCL) < 1, the output voltage could be regulated, i.e. Vout = 0.8V (1+R1/R2).
    However, when 0.8V (1+R1/R2) / (Vin - Iout (RDSon + RDCL) > 1, the device should work in 100% duty mode, i.e. Vout = Vin - Iout  (RDSon + RDCL).

    Therefore, the boudary condition of 100% duty mode is mainly depending on the output current and the DCR of the inductor.

    Is my understanding correct?

    Best regards,
    Iwata Etsuji

  • 0 in reply to Iwata Etsuji
    TI__Guru**** 191445 points

    Yes you are correct.  let me know if you need further assistance.