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TPS7A87: Time and input voltage required to reliably disable TPS7A87 and TPS7A90

Part Number: TPS7A87
Other Parts Discussed in Thread: TPS7A90, , TPS75005


When disabling the TPS7A87 and TPS7A90 with the EN pin, how long must the voltage drop below VIL?
For example, tens of nanoseconds or a few microseconds?

My customer had heard of this before because he had trouble with the LDO (TPS75005) Power on reset problem, and he's worried that a newly hired LDO will have a similar problem.

Also, do the TPS7A87 and TPS7A90 have a POR (Power on reset) function?
According to the block diagram, these ICs do not include POR.