LM5032: Maximum duty setting during external synchronous operation.

Hi,

The problem could be due to the fact that the LM5032 is been sync'ed to an external signal, can you check what the max duty cycle is when the sync signal is removed.

Thanks

Peter

Hi,

When the sync signal is removed, max duty cycle = 75%.

I think this value is fine.

I want to know.

Currently, RDCL = RT as described in the data sheet,

Maximum User Duty Cycle = 80% x RDCL/RT.

However, does this relationship hold even in external synchronous operation?

Maybe it is necessary to adjust the value of RDCL to the desired maximum duty

in accordance with the external synchronous operation frequency?

Thanks

Hi

I suspect that when syncing to a higher frequency the available duty cycle is reduced. Unfortunately I cant see any diagram of how the SYNC and RT circuits interact.

I suggest adjusting  the DCL resistor to get back to 75% duty cycle under the sync condition.

I have requested the spread from production testing so we can see the max and min values when RDCL = RT

Regards

Peter

Hi

I tried adjusting RDCL under the sync condition.

But the duty couldn't increase.

So I experimented,

Keep RDCL and RT at the same value, the free-running frequency was approached to the external synchronization frequency.

Then the duty increased.

However, to achieve a large duty, the free-run frequency and the external synchronization frequency must be very close.

I want to know,

The relationship between the external synchronization frequency, free-run frequency, and maximum duty.

Thank you.

Hi

I will need to discuss this with some of my colleagues, it will take a few days to get an response on to your question.

Regards

Peter

hi

We are in a rush to develop a project currently under development.

Due to this problem, it is necessary to quickly determine whether to use the LM5032 or not.

I would like to receive an answer as soon as possible.

Thank you very much.

Hi

The attached slide shows the relationship between the SYNC, free running frequency and the max duty cycle.

The other important consideration is the SYNC pulse width which will also reduce the max duty cycle by increasing the off time.

LM5032 Max Duty.pptx

Regards

Peter

Hi

Thank you for send the slide shows the relationship between the SYNC, free running frequency and the max duty cycle.

It was consistent with my experimental results and I was relieved.

All questions have been resolved.

We have determined that the LM5032 can be used in the developed product.

Thank you very much for everything.

Hi

Sorry, I have another question.

It is described in LM5032 Max Duty.pptx,

Adjusting RDCL further will not increase the MaxDuty.

Can I leave the RDCL pin open without attaching the RDCL resistor?

Thank you.

Hi

I'm sorry, but I want to check again.

MaxDuty(Sync)≒1 - (Tprog*20%/Tsync)

TProg is the period of the frequency programmed by RT resistor selection.

TSync is the period of the external Sync frequency.

For example,

Tprog/Tsync=0.95, MaxDuty(Sync)=1-0.95*0.2=1-0.19=0.81=81%

Tprog/Tsync=0.9, MaxDuty(Sync)=1-0.9*0.2=1-0.18=0.82=82%

Tprog/Tsync=0.8, MaxDuty(Sync)=1-0.8*0.2=1-0.16=0.84=84%

Tprog/Tsync=0.7, MaxDuty(Sync)=1-0.7*0.2=1-0.14=0.86=86%

Is this formula really correct?

Please show the correct calculation example.

Regards

Hi

For 180kHz free running and 220kHz Sync, Tprog is 5.55us, Tsync is 4.545us so 1 - ((Tprog*0.2)/Tsync) is 1 -((5.55*0.2)/4.545), = 0.755

For 180kHz free running and 200kHz Sync, Tprog is 5.55us, Tsync is 5us so 1 - ((Tprog*0.2)/Tsync) is 1 -((5.55*0.2)/5), = 0.778

For 180kHz free running and 190kHz Sync, Tprog is 5.55us, Tsync is 5.263us so 1 - ((Tprog*0.2)/Tsync) is 1 -((5.55*0.2)/5.263), = 0.789

For a faster SYNC frequency the effective max duty cycle falls, please also allow for the effect of the SYNC pulse width in the application.

Also the DCL pin should not be left open, see page 23, section 8.1.11 of the datasheet.

Regards

Peter