TPS54560B: About Output Voltage 28.8V. Duty 100% operation.

Hi 

I can't read out BOOT-SW voltage ,is CH4= Vboot-Vsw or only Vboot, where of its zero point?

TPS54560B work at 100% need thereis sufficicent votlage between Boot and SW . for you case, I suspect that the  voltage between boot and SW drop down to Boot UVLO which made the high side fet turned off.

Thanks

Daniel Li

Hi,

Boot-SW voltage is CH4 = Vboot-Vsw.

CH4 : 5V (higer than UVLO)

Thanks

Hi 

thank you for your waveforms.

1. in the DS, the boot refresh circuit has below description. it maybe worked when Vo drop down to 

"When operating with a low voltage difference from input to output, the high-side MOSFET of the TPS54560B operates at 100% duty cycle as long as the BOOT to SW pin voltage is greater than 2.1 V. When the voltage from BOOT to SW drops below 2.1 V, the high-side MOSFET is turned off, and an integrated low side MOSFET pulls SW low to recharge the BOOT capacitor. To reduce the losses of the small low-side MOSFET at high output voltages, it is disabled at 24-V output and re-enabled when the output reaches 21.5 V."

2. whether you have VIn UVLO circuit? I see Vo totally shutdown when Vin dropdown to certain voltage.  whether Vin UVLO enable and disable at SW abnormal point?

Thanks

Daniel Li

Hi,

Thank you for your prompt reply.

>1. in the DS, the boot refresh circuit has below description. it maybe worked when Vo drop down to
>"When operating with a low voltage difference from input to output, the high-side MOSFET of the TPS54560B operates at 100% duty cycle as long as the BOOT to SW pin voltage is greater than 2.1 V. When the voltage from BOOT to SW drops below 2.1 V, the high-side MOSFET is turned off, and an integrated low side MOSFET pulls SW low to recharge the BOOT capacitor. To reduce the losses of the small low-side MOSFET at high output voltages, it is disabled at 24-V output and re-enabled when the output reaches 21.5 V."

Our situation is below :
(1)The BOOT to SW pin voltage is 5V and greater than 2.1V at SW abnormal point.
(2)The Vin pin voltage is 25V.

Why does the small low-side MOSFET work in our situation?
We think the small low-side MOSFET does not work at SW abnormal point.

>2.whether you have VIn UVLO circuit? I see Vo totally shutdown when Vin dropdown to certain voltage.  whether Vin UVLO enable and disable at SW abnormal point?

We don't have Vin UVLO circuit.
We have only internal UVLO of TPS54560B.
At abnomal point:
（Vin=25V） > （Internal UVLO= 4.48Vmax）
※We confirmed that Vin is greater than 25V.
We think UVLO does not work at SW abnormal point.

Thanks

Akinari Takada

Hi:

is it possible to share the inductor current waveform? whether there is some kind of load transient at high side abnormal point?

Thanks

Daniel Li

Hi,

Thank you for your prompt reply.

The waveform is like this.

CH3 is the inductor current.

Waveform:

Thanks

Akinari Takada

Hi,

Please more questions.

Does the low-side FET work under the condition that Vin is 25V and Vboot to Vsw is 5V?

If low-side FET pulls SW low at Vin is 26V or more, does the junction temperature exceeds the thermal trip threshold?

Thanks

Hi

we will modified board , see whether we can find something.

Thanks

Hi

Have you been able to recreate the problem with your modified board?

Thanks

Akinari Takada

Hello Takada,

We are working to update you on the issue.

Hello,

We have been able to recreate the problem with the modified TPS54560EVM-515 for 28.8V.

The output current is 3A, and when we reduce the input voltage from 40V, this problem was recreate around 25.8V.

The circuit daiagram and waveform with problem are shown below.

This behavior is not written on the data sheet.

There are TPS54560B that has this problem and does not.

We think that this is your fault on design.

Anyway, this is serious broblem for us, so we strongly request you to resolve this problem as soon as possible.

Thanks

Akinari Takada

Hi

I am verify the EVM based on below modification. when the Vin at 27V, the internal pull down mosfet will switch its working statues which make the Vo drop no matter at 2A or 0A.  

CH1=SW, CH2=Vo, CH3=Boot

 And when we add a constant 4V between SW and Boot, it will solve the issue. so the issue is made by internal boot recharge circuit active and de-active at Vin=27V and VO dropout condition. 

CH1=SW, CH2=Vo, CH3=Boot

and you can find some way for  improve the boot circuit by below apps notes.

Thanks

Hi

Thanks for the reply.

When we add 4.6V between SW and Boot with external voltage, it does not resolve the issue.

The waveform with issue are shown below.

Does the internal boot recharge circuit active at Vin=27V , VO dropout condition and Vboot-sw ≧4V?

Thanks

Hi

based on my EVM , it has issue at 27Vin. and can you see no any pulse at low Vin condition?  I add a 4V, so SW and Boot voltage will be around 3.5V. 

from you waveform, it looks you keep the input voltage at 27V, is that right? can you share your email address?we can discuss through email

Thanks