UCC21530: Continuous Conduction mode

Hi Pratap

Thank you for your question. I work on the applications team in the high power drivers group.

I think your primary challenge is coming from the slow switching frequency combined with the high-side bootstrap supply. At a circuit level, Bootstrap supplies need higher switching frequency in order to be constantly replenished, otherwise Cboot runs out of charge and the gate driver turns off. If you really need to switch at such low frequencies, I recommend using some kind of isolated supply, such as SN6505B to provide the high-side bias. For purposes of simulation, you can just place a floating supply from VDDA-VSSA.

At a simulation level, this model needs the TR maximum time step in the Tools->Analysis Parameters menu to be much smaller. It’s kinda strange and I’m not exactly sure why, but at its default value of 10G, it allows the model to step through in ~300us increments which is why OUTA does not respond to the input immediately. Lowering the TR maximum time step to 50ns allowed the model to respond correctly and simulate the output. It runs much slower, though, since you’re still simulating 200ms - took about ~5 minutes on my laptop.

If this answered your question, could you please press the green button? If not, feel free to ask more questions.

Thanks and best regards,

John

Hi Pratap,

I'm honestly not too familiar with those devices. It looks like the DCP0205 is only designed for functional isolation and should not be used for reinforced isolation, like UCC21530. If you only need functional isolation (ie. just need a high-voltage half bridge driver), then it looks like the DCP0205 should be just fine, assuming it meets your power requirements.

Thanks,

John

Hi Pratap,

I mentioned the SN6505B because it is more configurable you can select the proper transformer for the gate drive bias that you want. You can see how this is implemented in this reference design:

https://www.ti.com/tool/PMP21561

I mainly hesitate to recommend the DCP0205 because it only lists signal isolation and ground bounce protection as its features, and does not list common-mode transient immunity. These fast switching, high voltage circuits need high CMTI in order to function properly. The SN6505B push-pull can handle that since the push-pull transformer has low CIO.

Thanks,

John

Pratap K said:

So if I use the SN6505B, then I will not need the bootstrap diode and capacitor. Am I correct?

Hi Pratap,

You are correct.

Best,
Dimitr

Hi Pratap,

I have found that simulators do not do a great job of simulating with nodes in a 'floating' configuration. They generally need to start at some reference voltage in relation to one other. With that in mind, you can either add a voltage source from the input side GND to the output side GND to establish this reference. You could also just put a very small capacitor and set the starting voltage to 0 to establish a reference level.

On the second question, it looks like the simulation is likely throwing an error because you are wiring V7, V8, and V9 in series with each other, creating a loop of voltage sources. These sources would try to push infinite current (70V+70V+70V = 210V) since 210V/0Ohms = Infinite current.

I would recommend that you just try to turn your HV DC supply from +80V to -80V to test the reverse voltage handling capability.

Based on my understanding, UCC21530 should be okay with this negative voltage handling, as long as the power supplies to the gate drivers are isolated and prevent VDDx-VSSx voltage from going beyond recommended maximum specifications.

Thanks,

John

Hi Pratap,

Usually, reverse supply protection is put in between the DC bus supply, and the DC bus caps. This can either be a diode, or an active circuit which can detect reverse current and shut off the flow of current. Something like seen in this tech note.

http://www.ti.com/lit/an/slva139/slva139.pdf

Can you please give me more context as to what your circuit is doing? There are many ways to safe guard against reverse current protection, but it is usually always done before the power stage. I have never seen it done in the power stage, usually because it adds extra cost and extra loop inductance to your switch loop. If you can draw me a simple diagram of what type of system this circuit needs to interface with, I may be able to help further.

Thanks,

John