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TPS54622: SS pin voltage

Given Ding
Expert 7355 points
Part Number: TPS54622
Other Parts Discussed in Thread: TPS54824

Hi Team,

Here is a question on SS pin of TPS54622. 

1. in datasheet, it mentioned that in pre-bias startup, low side FET is not allowed to closed until SS voltage goes to 1.4V.  So based on my understanding, that is, SS ramp from 0.8V to 1.4V which correspond to Vref from 0V to 0.6V, is it right? 

2. is there internal clamp on SS pin and what's the voltage of it?

Thanks. 

BRs

Given 

  • 0
    TI__Genius 14455 points

    Hi Given,

       The SS ramp goes from 0 all the way to 1.4V and even above to a final clamp value. When the SS ramp rises from 0 to 0.6V, the error amplifier Vref voltage rises from 0 to 0.6V ideally by picking the minimum of SS voltage and 0.6V. When the SS voltage rises above 0.6V, the error amplifier Vref stays at 0.6V - because minimum of SS voltage and 0.6V is now 0.6V. So, even though the SS ramp voltage rises all the way to 1.4V, the error amplifier Vref is still 0.6V because of the minimum function that is implemented in the error amplifier.

    The internal clamp voltage of SS pin should be less than or equal to 3V as that is the max voltage rating on that pin.

    Regards,

    Gerold

  • 0 in reply to Gerold Dhanabalan - Online Design Tools
    TI__Mastermind 35115 points

    Hi Given,

    One note to add. There is a "soft" handoff between the SS/TRK pin and the internal reference. See below for example from the TPS54824 datasheet where the handoff begins near SS/TRK = 0.6 V and ends near SS/TRK = 0.8 V. The TPS54622 has a very similar handoff.

  • 0 in reply to Anthony F
    TI__Expert 7355 points

    Hi Team,

    Thanks.

    But still confused on the description as below.

    " The device has been designed to prevent the low-side MOSFET from discharging a prebiased output. During monotonic prebiased startup, the low-side MOSFET is not allowed to sink current until the SS/TR pin voltage is higher than 1.4 V."

    So in pre-bias output, why does the low-side FET closed threshold be set at 1.4V? if SS ramps up to 0.6V then internal Vref takes charge, to my understanding, the threshold can be set by above 0.6V. Thanks.

    BRs

    Given

  • 0 in reply to Given Ding
    TI__Mastermind 35115 points

    Hi Given,

    The SS/TR pin reaching 1.4V is how the device determines that SS is complete. I believe this is set high so that we know the hand off from the SS pin to the internal reference is fully completed. If it was set at 0.6V, the handoff would not be complete yet. This threshold is also used for PG going high.