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BQ77PL900: requirement about BQ77PL900

Dexter Choi
Expert 2795 points
Part Number: BQ77PL900

Dear Sir,

I have some questions for below.

could you please advise me about below list.

1. If there is a circuit for reference when separating FET of the charging / discharging as like below picture, could you let me know side effect.


2. BQ77PL900 Balancing Related
A. Reason for limiting to Balancing R 500ohm ~ 1kohm.
B. bq77PL900EVM-001 EV kit 510oohm setting reason and balancing current (maximum,minimum) limit.
C. the internal block diagram for Cell sensing & balancing PIN and leakage current of each PIN.

  • 0
    TI__Guru 54715 points

    Hi Dexter,

    1. The circuit will generally work, some considerations: 

    A. Be sure the switch for DSG from the MCU stays on so that the BQ77PL900 can drive the FET on and off.  One concern may be if the BQ77PL900 has the discharge FET ON and the MCU turns its path off, the FET may switch slowly.  You may need to MCU to clamp the FET off.

    B. The BQ77PL900 drives the CHG output with respect to the PACK pin, the PACK pin should reference the source of the FET.  If using a diode in the path to PACK, a parallel resistor should also be used.

    C. The diode blocking discharge through the CHGP+ will have loss.  Consider a Schottky type. 

    D. The standard series FET configuration allows you to take P+ from the common drain point of the FETs, this allows DSG to still block discharge out the charge path.  It does allow the charger to directly supply the load however where your configuration allows DSG to be off to block the load.

    2. Balancing:

    A. The input filter resistance is limited to limit the balancing current.  The ICB absolute maximum is 10 mA, a resistance in that range will avoid abs max.  RVCX in the Recommended Operating Conditions table page 11 is 400 ohm typical which is also suitable.  The 10k shown in the balancing apnote http://www.ti.com/lit/pdf/slua463   is large and can show voltage errors.

    B. The 510 ohm RVCX resistors selected for the EVM provided a low balance current which should be safe in operation.  If the user applied 7V abs max cell voltage with 510 ohm and 400 ohm nominal internal RBAL current would be about 5 mA, well within abs max.  

    C. There is not a combined detailed diagram.  The data sheet functional block diagram page 6 shows an overview, figures 7 and 17 show sampling circuits for protection and monitoring, and the balancing apnote represents the cell balancing switches. Each input will also have some ESD circuit attached.  Input leakage is not a parameter, it is expected to be less than 1 uA  when the part is not operating.  When operating the sampling current can be observed.  Users have noticed the cell inputs can be damaged with leakage to GND or to the next input pin.