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CSD18532NQ5B: Tj and junction to case thermal resistance

Part Number: CSD18532NQ5B

I have measured the Temperature case of the mosfet (Tcase = 92 °C) and the ambient temperature is 60 °C in addition I know the power loss of the mosfet in this condition equal to 1.054 W.

How I can calculate the junction temperature of the mosfet?

Thanks,

Lorenzo

  • Hi Lorenzo,

    Thanks for the inquiry. The link below is to a blog explaining thermal impedance of TI MOSFETs. For this device, RthetaJC specified in the datasheet is measured at the thermal pad on the backside of the package. This is the primary path to remove heat from the package. Although we do not spec RthetaJC to the top of the package, simulations have shown that is about 8degC/W for the CSD18532NQ5B. You can use the case temperature measurement along with the thermal impedances to estimate the junction temperature as shown in the blog. If you measured the case temperature at or very near the thermal pad on the backside of the package, then the junction temperature will be within a few degrees of the case temperature due to the low thermal impedance. Even if you measure the topside of the package, the junction will still be within ~10degC of the case temperature.

  • thanks for the info.

    So, per your information, considering RthetaJC to the top of the package 8 °C/W

    with:

    Tc = tempetrature on the topside of the package = 92°C

    Ploss = 1.054 W

    then

    Tj =  92 + (8*1.054) = 100.4 °C

    Is it right?

    Thanks,

    Lorenzo

     

  • Hi Lorenzo,

    Your calculations appear to be correct assuming all of the dissipated power is removed thru the top of the package. In reality, think of the power like current and it will split between the two paths, top case and bottom case, with the thermal impedances acting like a current divider as shown in Figure 1 of the blog in my previous response. More of the dissipated power (heat) is typically removed thru the thermal pad on the backside of the package into the PCB and then to ambient. If we assume a 60/40 split between bottom and top, then the calculated temperature rise from case to junction is a little lower.

    https://e2e.ti.com/cfs-file/__key/communityserver-blogs-components-weblogfiles/00-00-00-03-59/3362.fig1.png

  • thanks for this additional clarification,

    so my calculation for Tj is a worst case, maybe real Tj is lower than the calculated one... better to be conservative and avoid issue during production!

    thanks again for your information.

    Regards,

    Lorenzo

  • You're welcome! I will close out this thread.

  • Before close the case, just a last question.

    Referring to the document you have shared, do you know and can you provide the ΨJT, Junction to Top of Package, for this MOSFET. It could be very useful for my analysis.

    Thanks for the collaboration.

    Kind regards

    Lorenzo

  • Hi Lorenzo,

    I'm sorry but TI has not done the characterization and analysis to provide those thermal metrics. There are no plans to do this.