TPS7H2201-SP: TPS7H2201

Hey Charles,

The TPS7H2201-SP inline parasitic inductance isn't something that can be disclosed.

Are you seeing issues with ringing on the input or output?

I imagine that the resistance of the device dampens the ringing you would generally see from the parasitic inductance from the device.

Thanks,

Daniel

Daniel

Thanks for your quick response, but I am not sure I am conveying the ramifications or question.

First, the parameter I am looking for I can simply measure in the on state (impedance). I was hoping to not have to sacrifice a device to get the data. So, I am not what you mean by can't be disclosed (given it can be measured). 

Second, since this is an inline device its total inductance is critical to the power integrity assessment and the PDN impedance flatness and therefore the entire power rail impedance performance. Really, this parameter should be in the datasheet since to use it a designer needs that number.

Hey Charles,

I will be more clear on why my initial response was we can't disclose that information publicly.

The way that I would think of to find the parasitic inductance of the device while still being able to neglect the parasitic of any layout/board/trim would reveal quite a bit about the internals of the device. This was the first method I thought of as measuring parasitic inductance with the device not on a board, but turned on seems difficult.

If you are okay with us measuring the parasitic inductance with the device on a board, that is more achievable, but given how small I expect it to be I would imagine the sources of error we would encounter would be large.

(I'm also moderately curious how difficult this would be with both powering my board while trying to use the large device I have to measure the impedance)

The short of it is a question and a comment;

Q: Are you okay with the device impedance being measured on the board?

C: Make sure to understand if we do measure this, it will be specific to that layout/board/trim. (I would use the EVM for the part if you want to see what the board         would look like)

Thanks,

Daniel

Daniel

A measurement would be great. so thank you. Yes, it has to be with a board and the EVM is fine. We will have to de-embed the measurement so if you could send us the measurement and either the board or (preferably) the EVM ODB++ files, so we could do the de-embedding. 

20nH is a bit more than we expected but ok.

Can you explain how you got 20nH a bit better? You say you have the inductance based on simulations but then you say "We found there to be approximately (but less than) 20 nH of parasitic inductance using the trim and form specification used with the attached ODB."

where on the PDB are the from/to points? Is it from the Vin lead end to Vout lead end?