• State Resolved
  • Locked Locked
  • Replies 5 replies
  • Answers 1 answer
  • Subscribers 65 subscribers
  • Views 296 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

LP87564-Q1: Remote sensing

Vicent Climent14
Intellectual 360 points
Part Number: LP87564-Q1

Dear TI members, 

We are currently using your LP87564 to supply a TDA2p processor. Due to some EMC problems we have found that we need to add ferrite beads at each one of the LP87564  outputs, just after the LC filter. But this solution is generating a new issue. The high current demanded by some of the TDA2p voltage rails is generating a voltage drop in those ferrite beads, which is getting more critical at high temperatures. 

We have tried to do a remote sensing of the DC signal by connecting FB pin after the ferrite bead. This seams to be functional at least in room conditions, but if we check the switching signal of the buck converter we can see that the PWM is not stable in the first seconds after power up and DC regulation is not very precise. It looks like the inductive part of the ferrite bead is affecting the feedback and it takes some time to adjust and lock the feedback loop.

Do you know if it is possible to adjust the LP87564 to perform this remote sensing?

Do you know if the AVS and other power management tools of the TDA2p would be able dynamically compensate this voltage drop?

BR,

Vicent Climent

  • 0
    TI__Genius 17380 points

    Hi Vicent,

    The engineer will respond on Monday EU time.

  • 0
    TI__Genius 11020 points

    Hello Vincent,

    The control loop for LP87564 is not designed for secondary L in the output and it will cause stability issues. So if the feedback is taken after the ferrite bead, the phase/gain margin will be poor and cause oscillation.

    Also the load transient response for the buck will be poor if ferrites are added to the output, so there's also affects to the dynamic performance, not only the DC drop. 

    So I would suggest trying some other methods for solving the EMC problems. Usually the layout is the first one to check. There's general guidance for it in the datasheet application section.

    Are you using snubbers on the SW nodes? Fine tuning those values can help with the EMC as well.

    Do you have EMI filters on the input side? In the LP8756 EVM we have used ferrites in the input side if you would like to check. That usually requires quite a lot bulk capacitance after the ferrite to have the input voltage stable after the filter(s).

    Thanks.

    Regards.

    Tomi Koskela

  • 0 in reply to Tomi Koskela
    Intellectual 360 points

    Hi Tomi, 

    Thank you very much for your answer. 

    I general we have taken a big effort to make sure that the power supply layout is properly done. Could it be possible for your experts to take a look on our layout implementation of the LP87564?

    Regarding the snubber, we have it mounted but didn't do a fine tune on it. We can check on that. 

    What might be a bit point here is the EMI filter you have in the input of the LP87564 EVM. Ours is right now much smaller as we are not placing that big capacitors (100uF) and the ferrite bead in the LP87564 input (I took for reference the following doc http://www.ti.com/lit/ug/snvu632/snvu632.pdf?ts=1587968020541). We will test this solution and get back to you with new results. 

    Thx and BR,

    Vicent Climent.

  • 0 in reply to Vicent Climent14
    Intellectual 360 points

    Hello Tomi,

    One question regarding the snubber.

    In the EVM it is recommending to set C=390nF + R=3.9Ohm (Check Figure 31 -> http://www.ti.com/lit/ug/snvu632/snvu632.pdf?ts=1587968020541).

    However in the datasheet it is stated that the recommended values are C=390pF + R=3.9Ohm (Check section 9.2.1.4 https://www.ti.com/lit/ds/symlink/lp87564-q1.pdf?ts=1588757803795). This are actually the values we had set in our design. 

    There is a big difference between snubber value of EVM and the recommended values in the datasheet. Is there a reason for this difference? We are now adjusting the snubber to values closer to what is placed in the EVM (33nF - 100nF). Could there be other side effect a part from temperature increase of the device? (for instance, stress of the switching output of the PMIC due to higher current is demanded at that point).

    BR,

    Vicent Climent

  • 0 in reply to Vicent Climent14
    TI__Genius 11020 points

    Hi Vicent,

    Yes that is actually an error in the EVM user guide. Sorry for the confusion. It should be 390pF, not 390nF.

    Increasing the snubber capacitor value will increase the power dissipation in the snubber resistor. There are guidelines for selecting the optimal snubber components, for example in application note SLVA255. 

    There is no other concern regarding the capacitance value other than the power dissipation and that it might not be optimal value considering the PCB parasitics.

    Thanks.

    Regards,

    Tomi Koskela