From TPS65023 Figure 28, when TPS65023 powers down, although Vcc input voltage is higher than UVLO(2.35V),DCDCx_EN and LDO_EN satrt to become low,can you tell me which factor causes this phenomenon?
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From TPS65023 Figure 28, when TPS65023 powers down, although Vcc input voltage is higher than UVLO(2.35V),DCDCx_EN and LDO_EN satrt to become low,can you tell me which factor causes this phenomenon?
DCDCx_EN and LDO_EN start to go low with VCC because they are all connected together externally on the board.