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TPS40400: Implement DVFS on TPS40400

Part Number: TPS40400
Other Parts Discussed in Thread: TPS650861, TPS549B22, TPS549D22, TPS546C20A, TPS546A24A, TPS546B24A, TPS546D24A

We are now estimating to implement DVFS on TPS40400. 

There are some questions we would like to have clarification from  TI before we start the implementation. 

We know TI has provided DVFS compatible drivers for some PMIC like TPS650861. 

Therefore we have the following questions: 

  1. Does the TPS40400 driver released by TI compatible with DVFS in Linux kernel? (Does DVFS function work with TPS40400 driver?) 
  2. Does  TPS40400 have any interrupt function to notify ARM/CPU that the voltage change has been done? 
  3. What is the time duration between TPS40400 gets I2C command to change the output voltage then TPS40400 really output target voltage accordingly?   
    1. Does the TPS40400 driver released by TI compatible with DVFS in Linux kernel? (Does DVFS function work with TPS40400driver?) 
      1. The TPS650861 PMIC uses a device and manufacturer specific mapping for the I2C control of the output voltage and switching frequency.
      2. The TPS40400 uses the standardized PMBus register mapping and file formats for output voltage and switching frequency control. 
      3. The same driver developed for the TPS650861 will not work for the TPS40400.
    2. Does  TPS40400have any interrupt function to notify ARM/CPU that the voltage change has been done? 
      1. The TPS40400 does not implement an out-of-band signal for "VR_SETTTLED"
    3. What is the time duration between TPS40400 gets I2C command to change the output voltage then TPS40400 really output target voltage accordingly?
      1. The reference voltage inside the TPS40400 will start to ramp to the new voltage within 500ns of the rising edge of data for the STOP bit of the transaction used to change VOUT.
      2. The reference slew-rate will be determined by the TON_RISE programming and output voltage, using the same slew-rate of VOUT / TON_RISE
      3. There will be some additional delay due to the voltage loop bandwidth as the output voltage lags behind the reference voltage.  The amount of delay will depend on the bandwidth of the control loop.

    1. Does TI have any plan to adapt TPS40400 driver to DVFS? Is it feasible or not?
    2. Is there any side effect if we implement a frequent voltage change like DVFS on TPS40400?
  •  

    TI does not provide a driver for the TPS40400.  The TPS40400 uses standard PMBus commands to implement output voltage control, so standardized firmware designed to use a processors I2C Master peripheral to send VOUT_COMMAND values to the TPS40400 would work once the VOUT_SCALE_LOOP register is programmed to match the resistor divider used between VOUT and FB.  The format used for VOUT_COMMAND in the TPS40400 is Linear16 with an exponent of -9, so each LSB of the 16-bit VOUT_COMMAND value is equal to 2^-9V or 1.95mV

    The TPS40400 is deigned to accept frequent output voltage changes as long as the output voltage changes are within the bandwidth of the voltage mode control loop.

    You may also want to consider one of our newer, integrated FET devices over the TPS40400.

    TPS549B22 - 25-A, Adaptive Constant On-time (D-CAP3) controlled converter w/ PMBus

    TPS549D22 - 40-A, Adaptive Constant On-time (D-CAP3) controlled converter w/ PMBus

    TPS546C20A - 35-A, Voltage Mode (VM) controlled converter with PMBus with Integrated Telemetry, stackable to 2-phases

    TPS546A24A - 10-A, Average Current Mode (ACM) controlled converter with PMBus with Integrated Telemetry, stackable to 4-phases 

    TPS546B24A - 20-A, Average Current Mode (ACM) controlled converter with PMBus with Integrated Telemetry, stackable to 4-phases 

    TPS546D24A - 40-A, Average Current Mode (ACM) controlled converter with PMBus with Integrated Telemetry, stackable to 4-phases 

    These newer devices integrated the Power FET with the controller for smaller size, simpler design, and better performance.