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CSD97396Q4M: Use of Synch Buck Power Stage in both buck and boost mode

Part Number: CSD97396Q4M
Other Parts Discussed in Thread: CSD95480RWJ,

We have a circuit application to move energy back and forth between a 12 volt energy storage system (large battery with makeup power supply) and a battery being tested from 8 to 6 volts.  In one mode the system will be charging the test article at a constant current from 6 to 8 volts and the power stage will be operated as a buck converter as it is defined in the data sheet.  This would be the constant current mode and the controller will be slowly slowly increasing the duty cycle of the PWM signal until the test article reaches 8V and then the controller would reduce the PWM to continue charging the test article at 8V with a slowly decreasing current.  To do this the controller will be reducing the PWM slowly until the system reached a minimum target current where the battery is considered charged.  While reducing the charge current at the constant voltage mode, the PWM should slowly be lowered to a theoretical zero current point of Vout/Vin or 8/12= 66.7% 

The question now is if the controller outputs a smaller PWM signal , say 65% will this power stage start to operate in boost mode taking power from the test article at 8V and boost it up to the 12V energy storage system.  If this was a conventional half bridge it would, but is there something in the power stage circuitry that prevents it from operating in boost mode.

We realize that the skip pin should be high at this point to turn off diode emulation, the fundamental question is if this power stage can operate in boost mode if setup and controlled properly.

Thanks

  • Hi Dave, 

    We will reply to you on Monday. 

    Thanks

    Qian

  • Hi Dave,

    The bi-directional operation is possible with sync FET on, as you mentioned setting skip pin high to disable DEM mode.  

    Just want to add some notes:

    1. The power stage is optimized for low duty cycle operation, so expect power loss to be higher with higher duty ratio.

    2. When operating with power transferring from low voltage side to high voltage side, the valley of inductor current is more negative so that voltage ringing may be different for control and sync FETs. You may need to validate ringing voltage under different operation conditions to make sure enough voltage margin.

    Best,

    Qingquan

  • Qingquan

    Thanks for following up, this is good news.  Is this the case with most of the sync buck power stages?

    We plan to only operate at 100kHz, and don't need to go past 20 amps.  Would the lower switching losses and 20% less current make up for the higher duty cycle?

    Do you know what the different Rds on values are for the control and synch switches.

    For the inductor I was going to use a 22uH unit https://www.digikey.com/product-detail/en/w%C3%BCrth-elektronik/74437529203220/732-11711-ND/8134285

    My calculations show your data sheet design with 290nH had 8.75 amps of ripple at 500 kHz, using a 22uH at 100kHz should get us a 1.25 amps ripple.

    Do you think operating with this much more inductance we would over come the issue of ringing in boost mode.

    If we can only get 15 amps out of the circuit in boost mode, that is likely OK for what we are doing.

    Thanks

    Dave Cook

  • Qingquan

    One more question, what about upgrading to the CSD95480RWJ chip for the 12V to 8V buck boost at 20 amps.

    This chip will also do buck/boost as long as we turn off diode emulation?

    Is there any issue with running 100kHz instead of the 500 or 600 in the sample circuits.

    Right now we are focused on this lower frequency because of your existing interleaving PWM generators.

    When we upgrade to the LM5179, we bump the speeds up.

    Thanks

  • Hi Dave,

    Yes, you are correct. The typical applications for power stages have relatively lower Vout voltage.

    Lower switching frequency and lower continuous current definitely will help with power loss. As to the Rdson, it requires NDA to be shared for power stage products. You may contact me at q-tang1@ti.com  to request more technical details.

    The inductor in your provided link showed saturation current around 21.7A, it would be risky if you want to operate upto 20A. 20% tolerance of inductance and inductance variation over temp also need to be considered.

    Lower current ripple should help with ringing based on fixed given design. But PCB layout is more critical to minimize the parasitic inductance to reduce ringing, as the ringing is mainly caused by oscillation between parasitic inductance and output cap of FETs.

    Best,

    Qingquan

  • Hi Dave,

    CSD95480RWJ probably cannot be used for your application, due to limitation on output voltage (5.5V max).

    Although our typical applications use higher frequency, I don't see issue with 100kHz as long as the bootstrap cap is sufficient to sustain the gate driver voltage. 

    Best,

    Qingquan

  • Qingquan

    Thanks for bringing the recommended Max Vout to my attention.   I looked up my first choice the CSD97396Q4M and it doesn't list a recommended Max Vout, but all the more complex and powerful SON 5x6 chips list the recommended max Vout at 5.5     This is too bad, this is a great chip  for what we want to do.

    I did notice that its Vsw to Pgnd is allowed to be 20V.  

    Can you look more into this and see if this max Vout is a firm limit for allowing max rated current and if we derate the chip as we plan to, we can operate at a higher voltage than 5.5 volts.

    We plan to use oversize inductors, run at lower currents and switching frequencies, but we'd really like to use this fully featured power stage with its temperature and current monitoring if its viable up to 8 Volts out.

    Thanks, sorry for making this complicated :-)

  • Hi Dave,

    The Vos pin rating is not related to output current. It's a pin connected to internal IC and the limitation is voltage itself. The absolute max voltage on this pin is 6V, and the IC might be damaged if Vout goes above 6V.

    Best,

    Qingquan