Other Parts Discussed in Thread: TL431LI-Q1, TL431
Hello Folks,
I have a question about the stability boundary conditions. I my design i have VKA from around 5.1 V and Ika of 4.2 mA.
In the datasheet Figure 16, recommends that for this condition the load capacitance CL should be higher than around 2µF (Curve B). Because the device may oscillate.
As depicted in my design, the Vref output is after a voltage divider with also a 1µF connected and my CL is 1µF.
My question is to know how critical is this oscillations and the stability. If the output voltage can goes to 0 V or the device can be damaged or the output voltage will drift or oscillations of x% can happen.
Thank in advance for the support.
My question is if we need to follow strictly this rule? because im my design I have a CL of 1µF and after a voltage divider with a capacitor of 1µF