I have some questions regarding the TPS63086 layoutL
1. One of the layout guidelines in the TPS63806 datasheet states to "use separate traces for the supply voltage of the power stage and supply voltage of the analog stage". Both input pins to the device are labeled "VIN", and the example layout doesn't seem to differentiate between them. Can this guideline be ignored?
2. Referring to the example layout, can the inductor be place on the bottom side? This way the additional 8 vias connecting the inductor are not necessary and this results in a more compact design. Are there disadvantages to placing the inductor on the bottom side in this case?
3. Also referring to the example layout in the TPS63806EVM, it seems that pins B2,B3 & D2,D3 have through-hole vias in them. Since the pad diameter is only 0.23mm, I'm wondering what kind of via was used? Is it some kind of stacked micro-via or some other technology?
Thank you in advance,