Other Parts Discussed in Thread: LM73605, LMZM33606, LMZM33606EVM
Based on start up waveform in tpsm53604 datasheet, delay between PG high and Vout Ok is around 3ms, pls provide detail value for this delay time.
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What specific details were you looking for with this?
Attached is an image from the validation team for a 12Vin/5Vout @3A:
As you pointed out the delay time of PG asserting high is roughly 3ms which appears typical here. I would expect the TPSM53604 to perform like this straight out of box.
we have a sequence requirement, we use PG of TPSM53604 to enable next rail, and next rail need output OK in 5ms after TPSM53604's Vo ready.
It seems TPSM53604 can not meet this requirement.
Do you have any suggestion to meet our requirement with this long delay time?
Just wanted to clarify that the PG signal is to show when the VOUT output is within nominal range. When the PG signal goes high is when the "Vo is ready" is how I would interpret this signal. However if this still does not meet your requirement, what is your input/output and loading requirements?
Perhaps I can find an alternative power module that can meet your needs.
Perhaps you can look at the LMZM33606 which integrates the LM73605 converter. Figure 67 shows a typical soft-start sequence. The delay time looks roughly half a division which comes out to around 1ms. There will be some additional delay glitch time of around 140us.
It may make sense to get a LMZM33606EVM and prototype to your application needs to evaluate the part.