• State Resolved
  • Locked Locked
  • Replies 3 replies
  • Answers 1 answer
  • Subscribers 62 subscribers
  • Views 277 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

UCC27714: Input pull down

Genatco
Guru 54057 points
Part Number: UCC27714
Other Parts Discussed in Thread: TIDA-00778

Why would it be necessary to add external pull down resistors on GPIO pins when the gate driver inputs have 400k pull downs? Do parallel external pull downs (10k/100k) change SNR of the MCU digital ground or PWM oscillator being so close to the package pins? Has any engineer at TI verified the SNR change to the MCU from adding lower resistance external pull downs to the gate driver input pins near the GPIO ports? I have never noticed external pull downs on PWM oscillator drive pins in any TI schematic.

The only reason I can think of for dividing resistance of internal 400k pull downs is a mistaken belief it will speed up the fall time greater than datasheet shows. What would be the point of trying to force the fall time to be any faster than the datasheet specified output turn off fall time with 400k?

Yet in TIDA-00778 schematic we see 10k pull downs added to the PWM drive outputs. And when GPIO outputs enter high impedance during POR will not the 400k be sufficient to hold down the gate drive outputs, especially if EN holds gate drives disabled during POR? Perhaps the engineer failed to add 10k pull down to the EN pin and had a bad experience. Since the EN pin is pulled up to VDD (+15v) via 400k it easily clubs 3v3 GPIO port without adding external 10k pull down to EN pin. Adding 10k pull down to EN keeps gate drive outputs disabled 2v9 during a POR or BOR and GPIO drives entering high impedance state.

  • 0
    TI__Mastermind 20950 points

    Hello GI,

    I cannot comment on tradeoff of adding pull down resistance regarding the impact to the uC GPIO pins performance. I would ask would if a 10K pulldown resistance would have any negative impact on the uC output pins generating the PWM drive signals.

    The input pulldown resistance in the driver is there for the function of providing a pull down path for the driver input if this signal is left in the open state. The internal resistance is a wide tolerance resistance not intended to be able to sink any significant current into the pin.

    I have actually spent significant time supporting a major customer with issues with the uC IO pins behavior during initialization, which has lead to hardware issues. This is the pin that was generating the PWM output and exhibited unexpected voltage levels during startup.

    My general advice would be to leave placeholders for external pulldown resistance, and to not populate if you expect the uC to definitely be in high resistance during initialization. If some concern arises this would leave an option without changing the board.

    Regards, 

  • 0 in reply to Richard Herring
    Guru 54057 points

    Hi Richard,

    Thanks for quick response amid Covid19 outbreak in Texas!

    Richard Herring said:
    My general advice would be to leave placeholders for external pulldown resistance, and to not populate if you expect the uC to definitely be in high resistance during initializatio

    Mostly the post questions, how safe is it to remove existing 20k parallel pull downs given Uc EN pin was pulled down externally via 10k/400k of +15 VDD. 

  • 0 in reply to Genatco
    TI__Mastermind 20950 points

    Hello GI,

    Assuming the uC should have no positive leakage current (or very low) into the driver pins during the initialization, the internal resistance on the input pins of the driver will pull down the inputs and set the low state. I generally suggest making provisions for a "back up" option in case you do see some issue when you build and test the hardware. For that reason, I would advise to make placeholders for pulldown resistance, in case there is some issue during testing.

    Confirm if this addresses your questions, or you can post additional questions on this thread.

    Regards,