TPS54326: delay time between VIN & VREG5

Sam Ting

Part Number: TPS54326

Hi team,

Could you please check the waveform below and comment on why the delay time between VIN and VREG5 is so long? Thanks!

The test condition: VIN= 5V, VOUT= 1.2V and the load= 1.75A.

(We know the PGOOD issue can be solved by connecting the pull-up resistor to VREG5)

CH1:5VSB (VIN), CH2:U57 pin3 (VREG5), CH3:V1P2S_POK (PGOOD) CH4: V1P2S_EN (EN)

Schematic:

Best regards,

Sam Ting

0 Tahar Allag over 4 years ago

Hello Sam,

Can you please capture the EN pin better? It is not clear where that V-EN went high in that plot.

For VOUT=1.2V, only 1.5uH is recommended. Make sure the Soft start cap designed correctly.

3.3nF is about the typical for 1.4ms stat up time.

Use only 1uF on VREG.

Thanks!

Tahar

0 Sam Ting over 4 years ago in reply to Tahar Allag

Hi Tahar,

Thanks for your comment!

For now, we just want to know whether the VREG output voltage will only start after the EN pin is enabled. Could you please comment?

We found that the above delay time depends on the timing of the EN signal, and hope to confirm whether the behavior is normal.

Best regards,
Sam Ting

0 Tahar Allag over 4 years ago in reply to Sam Ting

Hello Sam,

The VREG voltage will only start after the EN pin is enabled. AND the device will not start as well after the EN pin is enabled.

Thanks!

Tahar

0 Tahar Allag over 4 years ago in reply to Tahar Allag

Hi Sam,

I attached a TINA sim to confirm the VREG and VOUT turns on after EN is enabled

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