The failure report (QEM-CCR-1908-01072) which we received in December 2019 resulted in the following Root-Cause Analysis Theory:
• The return unit failed bench verification which confirmed the customer problem description.
• Multiple missing pockets of PO (Protective/Passivation Overcoating) and ILO (Inter Level Oxide) observed on the silicon which could not conclusive determine the failure mode as the unit observed EOS (Electrical Overstress) during failure isolation process on pin 5 and pin 3
• However, the FAB has provided a general CIP (Continuous Improvement Process) on particle in for its continuous improvement plan for this mature technology.
• The failure mode remained un-determined.
Corrective Actions Description Owner(s) Complete Date
1. ILD (Inter Level Dielectric) Particle Improvement from TSMC for ILD tool TSMC 2018/9
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Accordingly to this information, we hope that the improvement solved the observed problem.
Accordingly to this information, we would like to use REG71055 parts with a DateCode 2019 week 32 or newer.