This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

LMZM33606EVM: Overlapping PGND and GND

Part Number: LMZM33606EVM
Other Parts Discussed in Thread: LMZM33606


For LMZM33606 but also mostly any other Power IC from TI it is advised to seperate PGND and GND in the datasheet. Please look at graphic below: For LMZM33606EVM layer 2 is mostly used for PGND (marked green) and bottom layer mostly for GND (marked blue). That means, GND and PGND are overlapping on different layers, which results in some amount of capacitve coupling between PGND and GND. Other TI EVMs are solving this by seperating GND and PGND in areas that are not overlapping. My question is, is it in general okay to have those two layers overlapping? Is there any specific design guideline available from TI on how to design GND and PGND on PCB layout?