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UCD7138: Problems encountered in the application of UCD7138

人在江湖
Intellectual 705 points
Part Number: UCD7138
Other Parts Discussed in Thread: UCD3138A

As for TI's UCD7138 chip, I have the following questions:

1. CTRL pin is defined in the manual as: whether to enable rising edge optimization, but if CTRL is pulled down in the application, the chip will not be output.. May I ask how to use this pin?

2.The coordination between DTC pin and IN pin determines the OUT output, but there are contradictory descriptions IN the manual, as shown IN the figure below. Please inform us of the exact usage logic.

3. If DSP is used together with UCD7138 to complete the control of bi-directional full-bridge LLC resonant converter (or half-bridge LLC converter), how is the control logic of DTC pin and how to use it?

4. In typical applications, the typical leakage-source waveform and the expected waveform on the half-bridge LLC converter are given, as shown in the figure. Are there any marks that are wrong?We cannot understand the meaning of the picture, please let us know.

  • 0
    TI__Genius 13570 points

    Hello,

    1. CTRL pin is defined in the manual as: whether to enable rising edge optimization, but if CTRL is pulled down in the application, the chip will not be output.. May I ask how to use this pin?

    Comments: When CTRL is tied to ground, rising edge deadtime optimization is disabled; otherwise, rising edge deadtime optimization is enabled.

    2. SR drive signal has rising edge and falling edge. For OUT rising edge, OUT is determined by DTC and IN when CTRL is open/ or pulled high; for OUT falling edge, OUT is determined by IN only.

    3. DTC is reported to UCD3138A, hardware module of UCD3138A optimizes the SR turn off time. You can find the details from the below website.

    www.ti.com/.../ucd7138.pdf

    4. Maybe it should be changed to SR turn on later or earlier. In this way, it makes more senses.

    Regards,

    Sean