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TPSM82822: Please comment on the circuit design of my TPSM82822.

Part Number: TPSM82822

Hello team,

I designed two circuits with 1.2V and 1.8V output on the TPSM82822.
Please check and comment on the Schematic, BOM, WEBENCH report in the attached document.
These power supplies are used in FPGAs and peripheral circuits. Described in the attached document.
Thank you and best regards,
Yuichi Shintomi

  • Hi Yuichi,

    Your design for the 1.2V rail seems fine. 
    However the one for the 1.8V rail has a few issues:
    1. The resistive divider at the feedback pin will not set the Vout at 1.8V, it will set it at 1.2V. Please use equation 4 from page 12 of the datasheet to select the proper resistances.
    2. The total Cout of your design is over 80uF, as section 10.2.1.2.3 on page 12 of the datasheet suggests, having Cout>47uF means that loop stability will start to suffer and you will have to test the phase margin on your actual design

    Regards,
    Davor

  • Hi Davor

    >However the one for the 1.8V rail has a few issues:
    >1. The resistive divider at the feedback pin will not set the Vout at 1.8V, it will set it at 1.2V.

    200kohm is correct for Rfbb. I will attach the corrected version.

    >2. The total Cout of your design is over 80uF, as section 10.2.1.2.3 on page 12 of the datasheet suggests, having Cout>47uF means that loop stability will start to suffer and you will have to test the phase margin on your actual design

    The FPGA decoupling requirement requires 1pcs each of 47uF and 10uF. I thought it would be better to reselect another IC.
    Do you have any opinion that it is effective to put a coil or ferrite beads in front of 47uF when using TPSM82822?

    Regards,

    Yuichi

  • Hi Yuichi,

    The TPSM82822 will just have a lower phase margin for high capacitance and you will have to make Bode plot measurements to make sure that it is suitable for your design. 

    Placing a ferrite bead at the output as an added filter component will also affect the loop stability and you would again have to make Bode plot measurements to make sure that the phase margin is sufficient. (also a reminder that the more noisy side of a buck converter is the input, due to the switching current - if you are placing the ferrite bead to combat EMI).
    Another important aspect of a ferrite bead is that it also has a DC resistance which could cause Vout inaccuracy if the bead is placed after the FB loop. For best Vout accuracy the bead should be placed within the FB loop.

    Regards,
    Davor

  • Hi Davor

    I had a discussion with a TI Japan advisor.
    I decided to design 1.8V with TPSM82813SILR.

    Thank you for your cooperation.

    Do you have any other comments on the 1.2V design?

    Regards,

    Yuichi

  • Hi Yuichi,

    No further comments on the 1.2V design.

    Regards,
    Davor

  • Hi Davor

    Thank you for your kind reply.
    I design 1.2V Schematic.
    I will refer to your indication for 1.8V and proceed with the design paying attention to the voltage drop of ferrite.

    Regards,

    Yuichi