TPS793475-EP: TPS793475 LDO - PSRR

Well I am hooking my Circuit Card up to a SMPS, but I am not seeing a discrete spur... but a broadband noise blur/blob over approx 30-100kHz.

The issues isn't radiated, as I am able to fix this w/ using a extremely large inductor;  The previous designers seemed to have used a LDO; which isn't being used in this design.... So I was trying to emulate what seems to have been done prior.

The previous design used a LDO that went from ~5v to ~3v... where I don't have that much headroom... So I wasn't sure if that also played into my issue w/ not enough noise immunity.

Why am I not seeing the PSRR that the datasheet would suggest?

Thanks again!

Hi Zack,

The issues could be related to your headroom as you only have 0.5V and the datasheet shows 1V.  While the headroom that you have is more than the dropout voltage, it may be impacting the PSRR.  Can you try increasing the headroom to maintain 1V drop across the LDO to see what difference that makes?

Switching frequency spurs are typically at a single frequency, not a blur or blob as you described.  Furthermore, modern switching frequencies are well above 100 kHz.  If you are describing a 30 kHz - 100 kHz "blur" then you might be seeing something from the bench supply.  Bench power supplies may have switching frequencies in this range, in my experience.  Can you use a linear power supply as your bench supply to narrow this out?

I would make sure that your test leads aren't picking up the noise.  Keep the probes or wires away from any noisy magnetics that may be emitting noise.

If you can send me some schematics and test data that would help.  If you cannot send that to E2E forums, we can take this offline.  Raytheon has a nondisclosure agreement with TI and we have supported engineers from Raytheon before like this.  I've sent you a "friend request" through E2E and if you accept, you can email me directly if this works better for you.

Thanks,

- Stephen

Where does it show the 1v on the datasheet?  Does that make a significant difference typically with noise rejection?

The issue isn't present on the bench supply, but is present in the assembly I mate to.  This has been shown to be a issue w/ my card design, as the previous circuit card didn't exhibit this issue.

Thus, I will need to resolve it on my board.  

I think I only have a few paths;  Either try to increase the values of the passives (L's and C's)  or try to put in a LDO.

Currently I have approx 5.17v that I have to work with, and can regulate down to 4.75v, and still have an operable part.

Any thoughts?  Maybe an alternate part than the one I initially selected?

In figure 10, for example, the input voltage is 3.8V and the device listed is the 2.8V output version.  So that would be the 1V headroom.  When you say "noise rejection" I think you are saying PSRR, and at these values of headroom it might make a difference for PSRR.  This device is about 20 years old so we do not have all of the data on this that we would for our newer devices. 

Have you tried measuring the PSRR of your linear regulator with its load?  You can use the Omicron Bode 100, or another frequency response analyzer, to make this measurement.  If you measure PSRR on your card to be similar to the datasheet, then the LDO really is giving you the PSRR you expect it to and the noise is being injected into your output another way. Alternatively you can purchase an EVM of the TPS793, place your load on it and 0.5V headroom, and make the measurement on the EVM if that is easier. 

If you need to select a different LDO I would recommend the TPS7A47 which comes in the -EP version, although it is not a drop in replacement.

Thanks,

- Stephen

Interesting;  And yes, I am using Noise Rejection to mean PSRR;  Are these equivalent terms?

I don't have a Omicron Bode 100, but I do have a VNA;   I haven't made a measurement like this on a LDO though.

Would I just use DC Blocking caps on the input and output of my VNA, and then hook it up to the input and output of the LDO w/ a load attached?

Figure 16 is a great visual:  https://www.ti.com/lit/ds/symlink/tps7a47.pdf?ts=1600394884396&ref_url=https%253A%252F%252Fwww.ti.com%252Fproduct%252FTPS7A47

This helps me better see the very substantial impact of the amount of headroom has on the PSRR, and would reflect what I am also seeing.

I don't think that this part would provide me any benefit over the part I already am using.  Or do you suggest otherwise? (Seems to have less PSRR, and similar drop out, etc)

Thanks again,

Zack

 

Hi Zack,

Noise Rejection may not necessarily mean PSRR.  Noise comes in multiple flavors, but PSRR is strictly the ability of the linear regulator to reject conducted noise on the input voltage.  You can think of PSRR as similar to the audio susceptibility metric of a switching converter.  "Noise rejection" is a more generic term.

The following app notes explain how to make PSRR measurements.  In the first app note, the THS3120 EVM was used as an amplifier however any high speed low noise amplifier can be used, for low voltages like your application you have more flexibility here.

www.ti.com/.../slaa414a.pdf

https://www.ti.com/lit/an/slyt547/slyt547.pdf

Figure 16 in the TPS7A47 is shown that way because the dropout voltage (typical) is 307 mV for that component under 1A load.  The blue and purple lines in figure 16 are below the dropout voltage, and you can see the impact that makes.  Still, getting closer to the dropout voltage can make an impact on the PSRR curves. Once you are well above the dropout voltage, which is generally considered by the industry as 1V of headroom, you do not see any major impact on headroom in the PSRR plot.  In some ultra low dropout regulators "well above dropout" can be considered a lower value, perhaps 500 mV.  It's best to check the datasheet or make the measurement on your own hardware to be sure at these lower values of headroom.

The dropout voltage of the TPS7A47 may be around double the TPS79301-EP.  The TPS7A47 has a typical dropout of 216 mV at 500 mA load, and 307 mV at 1 A load.  The TPS79301-EP has a typical 77 mV dropout at 200 mA load.  It's hard to directly compare because they use different pass elements (BJT vs MOSFET) and the metrics are using different load currents.  Still, you likely have the headroom in your design for either choice.

Can you share what your output capacitance and load current is?  I plan on heading into the lab tomorrow and if there is time I can try to make the measurement for you on the TPS793, assuming we already have the EVM in our lab.  I'll use Vin = 5.17V and Vout = 4.75V.

Thanks,

- Stephen

Thanks for the link to the app notes.  I will read over them tomorrow.

As for the output capacitance, there isn't much;  approx. 30pF, not sure why so little was chosen.  

The max current that will be drawn is 100mA.

Thanks again,

Zack

Hi Zack,

Are you sure that there is not 2.2uF or larger on the output?  The device will be unstable if the output has less than this.  30pF is too small and this will probably lead to an instability.  The measurements will not make any sense if the device is unstable.  Let me know if it has more than 2.2uF on the output and I can look into making the PSRR measurement today.

Thanks,

- Stephen

Actually, the LDO will be a little bit farther back in the circuit;  So it will actually have more like of 4.7uF of output capacitance;

Thank you so much Stephen.

This clearly illustrates the issue I am seeing.  I will try to see what I can do going forward;  Perhaps I can use a higher voltage rail in the next spin of my CCA.