Inquiry about the LM5064 reference schematic and power switch implementation
1. In the LM5064 reference circuit diagram (EVALUATION BOARDS), C18 on the attached circuit diagram is open. I would like to know what the function of the capacitor is and why it should be opened.
2. To turn on the power switch, connect -48V (Low voltage) to the UVLO/EN Pin, and the PGOOD Pin fell to Low. (It is wrong on the attached circuit, but) When shut down, is there no way to keep VDD output or PGOOD high?