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ISO5451-Q1: Active Output Pull-down functionality

Genius 9880 points
Part Number: ISO5451-Q1

Hi Team,

We received a query from customer asking for the following information about the 9.3.2 Active Output Pull-down in the datasheet. For me to not miss any information from our customer, I will be copying the complete query below.

"From DS:
9.3.2 Active Output Pull-down
The Active output pulldown feature ensures that the IGBT gate OUT is clamped to VEE2 to ensure safe IGBT offstate when the output side is not connected to the power supply.

How does this function sense that the output side is not connected to the power supply? We get this problem when everything else seems ok, and suspect that it could be the BJT buffer "fooling" the driver to think that it is not connected to the IGBT gate."

Looking forward for your kind response.

Regards,

Maynard

  • Hi Maynard,

    Welcome to E2E!

    For a better visual I would suggest taking a look at the active output pull down of the UCC217xx devices(Inserted below for reference). Both devices have similar active output pull down feature.

    As shown below, if a charge is induced onto the gate, the active output pull-down FET will enable and will clamp the gate to VEE.

    If the customer is having issues with their design please provide more details so that i may assist you in trouble shooting the problem.

    Best regards,

    Andy Robles

  • Hi Maynard, in additional to Andy's supply, here are some more information. It doesn't sense on purposely, if there is output when unpowered, the high output pin voltage will inject voltage to the gate and turn on the pull down fet. The threshold is around 1.5V.

    If this still cannot solve your problem, can you please help illustrate it with a bit more detail?

    Thanks very much.

    Wei