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TPS7A7200: Understanding simulation issue and second questions on output capacitance

Part Number: TPS7A7200


I am simulating the TPS7A7200 using an imported netlist in a commonly available simulator.  The issue is, when grounding the internal set resistors to program any output voltage, the resulting output voltage is always 300mV lower than the input voltage.  Do you have a suggestion to resolve the problem or explain why this is occurring?  Also when using an external divider I do not see this problem.

 I have another question about the output capacitive loading of the part.  In section of the data sheet it states for output capacitors from 47 µF to 200 µF a feedforward capacitor of at least 220 pF must be used. The datasheet does not quote an absolute max for capacitance. In my application I would like to use an output capacitance of up to 300uF in ceramics.   Is this problematic? What feedforward value should be used to compensate? 

Thank you,

  • Hello HSG,

    Can you please show me the schematic of your simulation?  And have you tried the same simulation in Cadence for TI?

    The device was characterized for output capacitance up to 200 uF.  The range of stability depends on the load current as well as the output capacitance.  The datasheet must list stability for the entire range of load current, however in practice your actual load current is likely a subset of the datasheet range.  While it might be stable at 300 uF you would want to review this on the bench using a transient response (see the link below).  I would follow the same guidance in the datasheet on the feedforward capacitance to start, and you can increase the value if you find that you need some more margin.

    Keep in mind that the datasheet parameters are only for output capacitance at or below 200uF, so you will be operating outside of the datasheet specifications and the EC table is not guaranteed.


    - Stephen