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WEBENCH® Tools/TPS548D21: TPS548D21 with Input 12V, Output 0.82V with Current 40A

Part Number: TPS548D21

Tool/software: WEBENCH® Design Tools

TPS548D21:

we have used TPS548D21 into our design, below are the specifications.

Input = 3V-13V, Typical voltage 12V+/-8%,

Output = 0.82V@ 40A (max), Typical current 25A.

Input is always 12V+/- 8%, only during Power OFF case, we will connect Backup power which 3V - 4.6V and during backup time of ~25 seconds Max current will be ~6A.

Currently we are doing minor changes in the design to re-design for lesser current where we can reduce few Input & Output capacitors to save BOM for low power designs.

So, Output will be 0.82V@25A with Typical current 15A, all other specifications will be same.

Now, I have few questions on Webench simulation on this.

1. For Balanced configuration in Webench, I see FSEL down resister is always coming as 37.4K, we have initially used 22.1K, But as per Datasheet Table 2 for Our Vin,Vout = <12V,0.82V> Duty cycle will be ~7% as per Table 7 it should be 16.5K with 7uS Time constant. there is a variation, which configuration to go( RFSEL – 16.5K(D=5-7.5)/22.1K(D=7.5-12.5)/37.4K(D=>21) )

One more thing to be noted, during simulations I saw Vout deviation for a load transient is less with 37.4K always(checked with 22.1K and 37.4K).

2. Is there anyway I can change the Webench simulation parameters to simulate Load Transient of 20-30% - Currently it allows only 50-100%.

3. For 0.82V @ 25A with Typical current 15A, I am going ahead with Below Input, Output capacitor combination

 

0.82V@40A (old)

0.82V@25A(new)

Input Capacitors

12x22uF,1x0.1uF,1x2.2nF

6x22uF,1x0.1uF,1x2.2nF

Output Capacitors

10x100uF,7x150uF

7x100uF,7x150uF

I am not seeing much difference in the simulations and as the simulations are for 50% load transients they are violating 2.5% tolerance for all cases, I don’t have way to test 20% Transient configuration.

3a. Is there any way to access 20% load configuration from 50% Load transient results approximately.

3b. With this New Input & Output capacitor configuration Do you see issues.

 

4. Is there anyway we can access Stability checks in Webench, I will get data in SwitcherPro but I am not seeing much data on Webench regarding stability.

 

  • Hi

     You can customize your output cap design in WEBENCH for the TPS548D21. 

    You can also change the load step in WEBENCH sim as below.

    regards,

    Gerold

  • Hi Gerold,

    I already used those custom output specs to update worst case Vout ripple etc. Thanks.

    Regarding transient current level, it's limits are 50-100% of Load - I want to simulate 20% load configuration- I can't see any option to this.

    Please give replies to 

    1,2,3a,3b & 4 doubts also.

  • Hi

        Thanks for pointing it out. I have asked the WEBENCH team to fix the step size. 

    The TPS548D21 used DCAP3 architecture and bode plot model does not exist for this device. Thats why you dont see this in WEBENCH for this device. Following the recommendations given in the datasheet for Cout to meet stability will be needed.

    Regarding the other questions, we will get back to you shortly.

    Regards,

    Gerold

  • Hi,

    Regarding 1), when you made your design in WEBENCH, did you enter the full input range 3-13V? I believe WEBENCH is selecting the ramp to satisfy the entire input range and at 3-V input, the duty cycle will be ~27% which falls into the R x 3 ramp row in Table 7.

    We are still working on updating the step size in the load transient simulation so that you can simulate 20% or other load step sizes.

    Regards,
    Kris

  • Thanks Kris,

    Yes, the Input range is 3-13V in webench.

    On the same lines i will add

    Our design input parameters are like this. Input is always 12V+/-8%, Only when main power is lost, TPS548D21 is powered by backup source whose range is 3V-4.6V Max current of 0.82V during this time is ~6A for approx 26 seconds after that controller gets OFF.

    So, Selecting RFSEL = 16.5k will be the default setting(Dutycycle=5-7.5), But currently we are using 22.1k from old design.another thing when TPS548D21 powered by Backup source for ~26seconds <Input,output> = <3V,0.82V> Rfsel should be 37.4k.

    1a) Because the input range involves multiple duty cycle configurations, Is it OK to leave Rfsel=22.1k ?

    what will be the impact on transient response,stability of this resister Rfsel (22.1k/16.5k/37.4k).

    5) One more thing, In generated designs from Webench, i see Cfilt of 1nF across (Rfb_low and Rfb_high) - Is it required? we have not used it.

  • Hi,

    1a) Yes I think it is better to design Rfsel based on the typical input around 12V which is towards the max of your expected input range. In theory of DCAP operation, the higher Rfsel will reduce the injected ramp and increase your bandwidth, however, this will typically give you lower stability margins and increased jitter. This app note may give you some idea of tradeoffs in ramp selection.

    5) The 10-ohm Rrsp/Rrsn and Cfilt of 1nF form a low pass filter to help remove high frequency noise in the feedback path. The cutoff frequency is set high (well above the switching frequency) so that it does not add significant phase lag and affect stability of the converter, but the filter can help remove any high frequency noise coupled into the remote feedback lines back to the converter IC from the load. It is not explicitly required but we usually recommend customers to keep the differential cap placeholder so that it can be populated if needed.

    Regards,
    Kris

  • Hi,

    WEBENCH has been updated to allow wider range of step sizes for the load transient simulation. Please give it a try.

    Regards,
    Kris

  • Thanks i will try and check.

    Is it possible to see Stability plots in Webench Power designer

  • No, we do not have bode plots modeled for DCAPx parts in WEBENCH Power Designer.