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LMG1210: Design questions and schematic review

d_zero
Genius 4440 points
Part Number: LMG1210

Dear *,

Please can you review the attached schematic and help answer following questions ?

LMG1210.pdf

0) please comment the attached schematic.

1) Can we connect the pin1(NC) to VDD or VSS?

2) Gate driver is used in IIM, can we connect DLH to VDD and DHL to VDD?

3) can we connect the Pin 15 and 14 to HS ?

4) can we connect Pin 11 to HB or HO ?

5) What it the right way to choose BST diode regarding to DC bus voltage if 200V, and what is the min required If for BST diode?

6) In your demo designs why did you use Feed Through Capacitors for the boost capacitor? Can we use standard 0603 BST 1u capacitor for up to 2MHz Fsw and BSC500N20NS3GATMA1 mosfet?

7) How to calculate min input capacitance on VDD pin?

Best Regards,

D.

  • 0
    TI__Genius 13445 points

    Hello,

    1. NC pins do not have have an internal connection therefore you may leave it floating or connect externally to VSS. 

    2. For IIM, please refer to Figure 16 of the datasheet where DHL connects to VSS (or floated) AND DLH connects to VDD.

    3. Pin 14 should be connected to HS and pin 15 does not have an internal connection therefore I suggest you leave it floating. 

    4. Same comment for pin 11, no internal connection, I recommend you leave floating.

    5. Boot diode voltage rating should be >= 200V with sufficient margin for Vbus variations and shifts. 

    6. Given the low gate charge on the FETs, you do not need bootstrap cap of 1uF. 0.1uF should be sufficient.

    7. VDD capacitors should be sized such CVDD = 10*Cboot. 

    I suggest you review the attached document on sizing boot cap and decoupling capacitor.

     You might also use our LMG120EVM as a reference.

    Regards,

    -Mamadou

  • 0 in reply to Mamadou Diallo
    Genius 4440 points

    Dear Mamadou,

    thank you for the feedback.

    1) OK i will connect pin1 to VSS

    2) Above the figure 16 in text says that the DHL can also be connected to Vdd is this a typo?
    "For independent input mode, DLH is tied to VDD and DHL is internally set to high-impedance and can be tied to VDD, tied to ground or left floating."

    3)Ok

    4)Ok

    5) regarding the BST diode i revived you EVM that you attached and it says that the EVM is designed for 100V Table1 and page 6 and you choosed for D1 a BAT46WJ,115 that has Vr =100V, so for 200V is the MBR2H200SFT1G a good choice?

    6) i used the calculation form DS page 17 and i get 821nF so i choose 1uF

    Pout 24 W
    Vin 12 V
    Vout 200 V
    Iout 0.12 A
    Vdd 5 V
    n 0.85
    D 0.949
    fsw 1350 kHz
    L 15 uH
    Qgh 10 nC
    Qrr 400 nC
    IHB 0.00085 A
    ton 7.03E-07 s
    dV 0.5 V
    Cbst 822.195 nF

    7) i will leave footprint for tuning.

    8) For the BST series resistor, is it needed in every design ro is it a good practice to lave 0402 0R resistor and tune it after?

    Best Regards,

    D.

  • 0 in reply to d_zero
    TI__Genius 13445 points

    Hello,

    2) Yes that is correct assuming you set the dead time accordingly on the from the MCU. DHL may be tied to VDD, VSS or GND in IIM.

    5) No the EVM rating is limited to Vbus = 100V and because it uses 100V FETs reason why we chose 100V boot diode.

    6) Makes sense, I confirmed your calculations of the min boot cap. 1uF cap in that case seems reasonable, I would recommend 2 parallel ESR caps and sizing VDD cap to be >=10uF in parallel to 0.1uF cap for HF noise filtering.

    8) This is optional, you may just use placeholder 0R.

    Regards,

    -Mamadou