I designed a driver board with UCC5390-Q1 and noticed that the temperature rise on the IC was higher than my expectation.
Below is the circuit schematic. The PCB layout basically follows the recommendation.
The measured VCC2 and VEE2 were stable at 14.2 V and -3 V. The PWM applied was 1 MHz at a 50% duty cycle.
The load was a SiC device with a nominal Qg around 35 nC and an internal gate resistance about 3.5 Ω. The device was left open circuit with no Vds applied. Expected total output Pd shall be around 0.7 W.
Room temperature about 25˚C. Still air. Temperature was measured with a thermal cam.
Test Result 1: Rg applied was 10 Ω. GS waveform was correct but the final IC case top temperature reached 75˚C (input side of IC was cool). All surrounding objects have a lower temperature.
Test Result 2: Rg was removed and shorted. GS waveform was correct but the final IC case top temperature reached 73˚C (input side of IC was cool). All surrounding objects have a lower temperature.
My questions are
1) From the application note, the calculated IC output loss for test 1 should be 0.7W/2 * (0.7/(0.7+13.5)+0.13/(0.13+13.5)) = 0.02 W. Is this 50˚C temperature rise normal? Or do I make a mistake on the evaluation?
2) The IC output loss in test 1 (total external Rg 10+3.5) shall be greatly increased in test 2. Why was the final IC case temperature to be almost the same?