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TPS544B20: CNTL and PMBus usage

Naveen HN
Intellectual 290 points
Part Number: TPS544B20
Other Parts Discussed in Thread: TPS544C20

Hi,

We are planning to use TPS544B20 regulator for core supply in our system. The core supply will be enabled after the IO supplies are turned ON as per sequencing requirements. I need to turn ON the TPS544B20 after IO supply comes up. I want to use 3.3V supply for enabling TPS544B20 core regulator. As read in other posts, by default, the regulator will be enabled once CNTL pin sees high, please re-confirm.

We have only I2C bus on board and want to use it to vary the output voltage of TPS544B20 using I2C. Since the device supports PMBUS and as we know PMBUS is superset of I2C, is there any thing to be taken care in software to use I2C to write/read registers of TPS544B20? Can I use system 3.3V as pull-up for I2C?

Thanks

Naveen

  • 0
    TI__Mastermind 48200 points

     

    1) Yes, by default the TPS544C20's ON_OFF_CONFIG command is set to respond to the CNTL pin and enable output conversion when the CNTL pin is driven high.

    2) Yes, the TPS544C20's CNTL pin can be driven by a 3.3V source.  This can be its own 3.3V regulator (BP3) or an external 3.3V.  If VDD of the TPS544C20 will be powered before the CNTL pin is actively pulled low, it is advisable to add a small passive pull-down to the CNTL pin to prevent process dependent leakage currents into the pin from allowing the CNTL pin to drift high and enable conversion before the external control circuitry can be powered.

    3) Yes, the default ON_OFF_CONFIG polarity for the CNTL pin is "Active High" with a "high" value on CNTL enabling output conversion.

    4) PMBus uses the SMBus transfer protocols.  All transactions must start with a Start bit, the target device's Write Address, followed by the Command Code (I2C Register Address).

    To write data, then send the data byte or bytes to be sent, followed by a stop bit.

    To read data, send a repeated start, followed by the target device's read address, then the I2C host must continue cycling the CLK for the TPS544C20 to respond with the appropriate data.

    Per SMBus the TPS544C20 supports Packet Error Check (PEC) which preforms an 8-bit Cyclical Redundancy Check (CRC).  If an extra byte of data is sent during a write transaction, that byte will be compared to the internally generated PEC byte.  If the written byte does not match the internally generated byte, the packet will be rejected and the data discarded.  If an extra byte worth of CLK cycles are provided by the host during a read transaction, the TPS544C20 will respond with a PEC byte for data validation by the host.

    If the I2C peripheral or driver on your device supports direct write transfer, repeated start read transfer, and variable data lengths including: None, 1-byte, and 2-bytes, you should be able to use the I2C to drive PMBus without issue.  If it can not support one or more of these features, we might have to discuss alternatives.

    5) Yes, you can use a 3.3V supply for I2C/PMBus termination, that can be the TPS544C20's BP3 output or other 3.3V rail on the system.  For best performance, limit the pull-up currents to no more than 2mV when the CLK or DAT lines are 0.4V.

  • 0 in reply to Peter James Miller
    Intellectual 290 points

    Thank you Peter for the quick response. This helps

    -Naveen

  • 0 in reply to Naveen HN
    TI__Mastermind 48200 points

     

    I am glad we were able to help.  This thread is now closed.  If you have any additional concerns, questions, or need further assistance, please create a new topic so we can assist you.