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UA78L: Layout for Thermal Considerations?

Part Number: UA78L

Hello,

I am planning to use the UA78L12AC in the SOT-89 package in a design that requires <50mA. I see the data sheet states that the package has a 54.7°C/W junction to ambient thermal resistance. Is this achieved in conjunction with the layout example shown on page 13 of the data sheet? If not and if we do not want to use a heat sink, besides maybe enlarging the ground plane and having more vias to ground is there another layout consideration we can make?

Thank you,

Thi Le

  • Hi Thi Le,

    The thermal metrics in the datasheet are obtained using computational fluid dynamics (CFD) simulations, which perform the simulations using a JEDEC standardized board that is not optimized for thermal performance. Hence, the thermal metrics in the datasheet can be improved upon by optimizing your board for thermal performance, which usually means having more copper and thermal vias near the device as you mentioned. This app note discusses ways to improve thermal performance and gives empirical data showing the improvements. 

    Can you share what the expected input and output voltages are? 

    Best regards,

    Nick

  • Hi Nick,

    Thank you for your response! I will definitely take a look at that app note.

    Expected input voltage is 24V, output voltage is 12V.

    Thank you,

    Thi Le

  • Hi Thi Le,

    The junction temperature rise (max) with your operating conditions is (24-12)V * .05A * 54.7C/W = 32.8C. What are the expected ambient conditions? This is not a huge junction temperature rise, so you should be able to use this part at a pretty high ambient temperature without needing to worry too much about overheating.

    Best regards,

    Nick