Other Parts Discussed in Thread: TPSM82813
I am using an FPGA which shows the following decoupling requirement for a power rail that I would like to source from a TPS82085:
two 330uF ceramic
one 100uF ceramic
five 47uF ceramic
three 10uF ceramic
three 470uF aluminum polymer
The polymer caps are supposed to be placed near the regulator. The maximum current draw on this rail is 3A but will be closer to 2A in my application. I have submitted a question to the FPGA supplier about the polymer caps since they take up a ton of board space and don't seem to provide any benefit. My other concern is that the roughly 1000uF of ceramic capacitance might be an issue for the TPS82085 at startup. There should not be any load on the supply as it ramps since the FPGA logic will not be operational until well after the supply is stable. I noticed this comment in the TPS8205 spec:
"Values over 150 μF may be possible with a reduced load during startup in order to avoid triggering the Hiccup short circuit protection."
Is 1000uF going to work here, assuming the load is <100mA during powerup ramp?
Thanks - Jason