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CSD17571Q2: MOSFET Zth

Part Number: CSD17571Q2
I am concerned about the increase in temperature of a MOSFET.
Temperature = 25 grad
I drive a power resistor, with a single pulse with ton=300ms; the current is 7A.
From the datasheet I extract Zth=0,2*190=38K/W and Rds=24mOhms.
Power dissipation of the MOSFET=7*7*0,024=1,176W
That means an increase in temperature of 1,17*38=45K
Anyway, during the ON pulse the Rds will increase accordingly, due to temperature.
But I calculated Power dissipation considering the Rds@25=24m.
Is that ok? Does the Thermal Impedance Graph already consider the increase of Rds during the on pulse or should I apply a derating factor?
Thank you for your answer!
Best regards, Gheorghe
  • Hi Gheorghe,

    Thanks for your interest in TI FETs. The transient thermal impedance curves are based on power dissipation and not current. The temperature variation of on resistance is not really relevant to the curves in the datasheet. Your power dissipation calculation should take into account the temperature variation of on resistance. Multiply the I2R loss by the normalized on resistance shown in Figure 8 of the datasheet at the operating temperature of the FET. For example, at 100degC & VGS = 4.5V, the normalizing factor is about 1.4. That should give you a better estimate of the power loss.

  • Hi John, 

    thank you anyway for the answer! But I didn't say that the transient thermal impedance curves are based on current!

    It is still not clear to me, therefore I will repeat my calculation and I will ask again my questions:

    Temperature = 25 grad; ton=300ms, single pulse; I=7A
    From the datasheet: Zth=0,2*190=38K/W and Rds=24mOhms, worst case;
    In the above example I considered Power Loss being constant, 1,176W, during the whole ON pulse! But toward the end of the pulse the Rds will be 1.3*24=31.2mOhms and the P_loss will be 7*7*0.0312=1.53W, no more 1.176W. That means the P_loss will increase between the start and the end of the pulse from 1.176W to 1.53W, linearly or alike.
    Question: is it ok to take into account the initial P_loss (1.176W), like in the above example? this is my main concern.
    I hope I stated clearly my question.
    Best Regards, Gheorghe
  • Hi Gheorghe,

    Apologies for any confusion. You are correct that the power dissipation is going to increase because on resistance goes up as the device self heats. My approach was to assume that the on resistance was at its maximum due to temperature rise during the entire pulse. This is worst case and may over estimate the junction temperature rise. Another approach could be to average the loss at the beginning, where the FET is cooler, to the end of the pulse when the junction temperature is higher. For example, use (1.176W + 1.53W)/2 for your calculation.This assumes a linear increase in rds(on). I just want to make sure you're not underestimating the temperature rise.