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CSD88599Q5DC: Unused pins on Half-Bridge NexFET™ Power Block

Iain Milnes
Prodigy 100 points
Part Number: CSD88599Q5DC
Other Parts Discussed in Thread: DRV8320,

As with the evaluation board for the DRV8320, we are making our board with 140 µm (2 oz) copper. We are using the DRV8320 with three of CSD88599Q5DC.

It is preferable to have minimum copper width and spacing to be 250 µm for ease of manufacturing such a board with thick copper.

This is achievable everywhere except on the unused (no connect) pins 23~26 of the Q5DC Package. With those, pins there is only 200 µm between each of them and the active pins.

Can I connect the unused and active pins together (that is 23 and 1, 24 and 11, 25 and 12, and 26 and 22)? If that is possible, then the entire board has 250 µm line and spacing.

  • 0
    TI__Mastermind 29525 points

    Hi lain,

    Thanks for the inquiry. I am checking with our SMT expert to see if it is OK to connect the unused pins to the adjacent active pins. I believe these are just anchor points and will update you as soon as I have an answer.

  • 0 in reply to John Wallace1
    TI__Mastermind 29525 points

    Hi lain,

    The feedback from our SMT expert is below. Please review and let me know if you have any additional questions.

    From TI SMT expert:

    I don’t think connecting the four corner anchor pin to the adjacent pins is a good idea.

    The corner location is usually having the highest stress. Purpose of the No Connect anchor
    pin is to absorb the stress and even if they crack, there will be no functional impact to the
    device performance.

    If we connect the anchor pin to adjacent pin, crack can propagate to the functional pin
    and cause a failure.

    Pin 11 and 12 are fused pins. If we connect the anchor to the fused pins, solder will be
    pulled from the anchor to the fused pins during reflow end up package tilting.

    The 250um spacing requirement was probably to avoid solder bridging from the corner pads to adjacent pads. Since those 4 anchors are No Connect,
    even if there is a short, it won’t cause any functional issue.

    The current spacing of 200um meet the JEDEC minimum gap between metal.

    We would suggest the customer to follow our package drawing for PCB land
    pattern and stencil.