Other Parts Discussed in Thread: ISO5852S
[reposted due to photo display issue]
Hi TI representatives,
We are using ISO5852s for half-bridge SiC MOSFET. VDC bus is ~200V and target to trigger DSAT at Vds ~ 1.4V in less than 2 us. The circuit snippet is as below:
The protection is working very well during shoot-through test when Q2 is pre-biased ON and then purposefully turn on Q1. Measurement of DSAT signals on both top/bottom Iso5852 shows interesting waveforms:
It seems like the Q2 triggers DESAT first, and that does make sense. But, I don't know why the Top DESAT misses the first trigger? The highlighted area is well above +9V in more than 1 us.
Any comment/thought is appreciated.