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CSD18534Q5A: PCB copper sheet thermal resistance

Part Number: CSD18534Q5A
Other Parts Discussed in Thread: CSD

Dear Forum,

I am little bit confused when calculating PCB heatsink surface-ambent Rth.

In the device datasheet a reference given: (2) Device mounted on FR4 material with 1 inch2 (6.45 cm2), 2 oz. (0.071 mm thick) Cu.

Yielding Rthja = 50 C/W (neglecting Rthjc which is very small).

However, it is not menitoned whether this is 1 inch2 area achieved by sum of TOP/BOTT or by single layer or 1 inch2 exposed onto both side.

According to AN-2020 application note: for double side heatsink: Areq=155/(2*Rthsa) - >1,55 inch2 would needed for 50C/W.

AN-2020 also states A=155/(2*Rthsa) formula takes account to radiation as well, by calcualting a (radiation) modified coefficient heat of transfer parameter (by choosen to 10 W/mK)

For 1 inch2: Rthsa=(1/h)*/A=(1/10 W/m²K)/0,000645m²=155 ⁰C/W.

Thanks and regards,

Joseph

  • Hi Joseph,

    Thanks for the inquiry. The PCB used to measure thermal impedance is single-sided, 2 oz. copper. I am not very familiar with AN-2020 but I did review it. This seems like a reasonable methodology to do thermal estimations and approximate PCB design. TI measures thermal impedance of our FETs during product development on the "standard" PCB design shown in the datasheet. TI can only guarantee junction-to-case thermal impedance. Please refer to the blog in the link below for more details on how TI specifies and tests thermal impedance. Also included is a link to another application report on thermal metrics. You may need to look into thermal modeling for a more detailed analysis.

    http://e2e.ti.com/blogs_/b/powerhouse/archive/2016/06/10/understanding-mosfet-data-sheets-part-6-thermal-impedance

    https://www.ti.com/lit/an/spra953c/spra953c.pdf



  • Hi John,

    thank you for your reply and the document links! Of course TI can guarantee only junction-to-case thermal impedance.

    Meanwhile I was thinking about thermal phenomenon:

    If we calculate the lateral thermal resistance of FR4 substrate we get ca 8-9 C/W/inch2. It much smaller then Rthsa mainly governed by convection: Q=h*A*(T1-T2) which yields 155 C/W /inch2. (AN-2020)

    Therefore (i think) FR4 other side (where no copper layer) almost so effective then coppered side (due to the thermal conductivity of FR4-> not an insulator!).

    So, the Rthsa halfed: 77,5/inch2 which is more close your published 50 C/W/inch appeared in CSD datasheet. I also assume thicker copper, green silkscreen (radiation increase) and FR4 larger substarte (over the 1 inch2 copper - > larger then copper foil) should responsible for the further reduction of Rthsa down to the published 50 value.

    Best regards,

    Joseph

  • Hi Joseph,

    Thanks again for your interest in TI FETs. Please remember, the published value of the junction-to-ambient thermal impedance in the datasheet is based on actual testing. I believe you have very good insight into the heat transfer mechanisms. Please feel free to reach on on e2e if there's anything else we can help you with.