UCC28C43-Q1: COMP pin High level output voltage

Hi,

COMP Abs Max specified as 6.3V (I suspect 6.8V in your message is actually 6.3V, otherwise let me know where is 6.3V you find in the datasheet.), is its maximum voltage that this pin can tolerate without damage. COMP pin can be connected external circuit so its abs max voltage needs to be specified and does not have to be the same as VREF. 

I think it is a typo error and should be 6.3V.

It specifies how much COMP pin can be on the pin since COMP pin can be connected to an external circuit which voltage cannot exceed 6.3V. If you use internal 5VREF, then COMP max is on VREF specs.

5V.

Hi,

Note Tina model is created on Datasheet so if Datasheet says COMP typical 6.8V then the model will set up it as 6.8V

The COMP should not be over 6.3V based on its abs max specs. So the Datasheet needs to make consistency correction.

Inside VREF bias the circuit.

Hi,

I suggest you use 6.3V of COMP for your external circuit consideration as COMP abs max is specified 6.3V. There is obvious inconsistency on COMP pin specs to fix. If COMP 6.3V specs cannot solve your design issues, please describe your issues, and it looks there is no meaning to continue discovering COMP pin why 6.3V or 6.8V as which will be needed to fix for datasheet correction.

The IC internal circuit is biased by VREF which normal value is 5V. Why COMP has specs of 6.3V, or 6.8V, we will find out and make correction in the next datasheet revision. For now, if COMP 6.3V or 6.8V shows issues on your design, let's focus on solving your associated design issues.

Hi,

The FB issue should be related to either the Tina model or your model circuit setup. You may send to me with the model of your circuit for a look if you like.

Hi,

I have run your model. I got FB = 2.5V. The attached is FB and COMP.

Hi,

I used analysis transient to run your model and obtained the result. The FB, COMP, as well others will be settled down by the circuit especially the components between FB and COMP.

Also, your Vdd15 is not 15V from the simulation, it is close to 16.7V

Hi,

Vdd15 is connected to R1 in the circuit I received.

Your VS1 setup is zero which keeping pull-down FB to zero.

I do not know what VS1 in your circuit is (I think that is the question for you) and where you get VS1 to connect to R1. You just need to add a voltage sense probe to VS1 connection and run transient simulation you can see VS1 drops to zero and pulling down FB to zero.