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UCC21540-Q1: UCC21540-Q1

Hossein Haghnazari
Prodigy 80 points
Part Number: UCC21540-Q1

Hello, I hope this message finds you well.

I want use UCC21540-Q1 in order to drive my N-MOSFETs that I am going to use for my prototype. In order to turn off my MODFETs I want to use a negative Vgs and I found the following interesting configuration in the datasheet of UCC21540-Q1 IC. I have some doubts about capacitors CA1 and CA2 I would really appreciate it if you could help me out with these issues.

1. Is it possible to implement this configuration without using aforementioned capacitors? (If I remove them will there be a problem?)

2. what is the purpose of using these capacitors (CA1 & CA2)? Are they mounted in order to regulate the voltage of the Zener diode?

3. What will be the capacitance and voltage of these capacitors if VDDA-VSSA = 17-5 V as it is suggested in the datasheet? 

4. Are they non-polarized ceramic capacitors? 

5. Are all the capacitors that are used in this configuration, non-polarized ceramic capacitors?

Thank you for your time and help.

  • 0
    TI__Expert 4065 points

    Hi Hossein,

    These are all very good questions, I will need some more time to get back to you. I will have a response Friday before end of day.

    Thanks,

    Krystian

  • 0 in reply to Krystian Plaskota
    TI__Expert 4065 points

    Hi Hossein,

    For your first two questions:

    There will be problems removing these capacitors as they not only help improve noise immunity, they also allow a low impedance path to supply the high gate drive current for the VSSA or VDDA pins. They also play a role in keeping the supply voltage VA steady. If the capacitors are removed and high current is drawn quickly by the gate driver for the FET, the VA supply can drop. A drop in the supply can trigger UVLO and shut down the device potentially. The capacitor between the VDDA and VSSA pins is also important to have because it provides a low impedance decoupling to the gate driver itself. 

    3. What will be the capacitance and voltage of these capacitors if VDDA-VSSA = 17-5 V as it is suggested in the datasheet? 

    These capacitors should be 10-20 times bigger than the gate charge of your FET. Here is a link to a reference design that uses negative turn off that you can follow because it has a good implementation of this circuit. www.ti.com/.../PMP21561

    4. Are they non-polarized ceramic capacitors? 

    The capacitors should be ceramic, they need to be low impedance and decouple the gate current which is very fast. 

    5. Are all the capacitors that are used in this configuration, non-polarized ceramic capacitors?

    Yes.

    Regards,

    Krystian

  • 0 in reply to Krystian Plaskota
    Prodigy 80 points

    Hello Krystian,

    Thank you for your helpful information. I got your point. 

    Best regards,

    Hossein.