Team, I am having a design issue relating to the UCD90160ARGCT Voltage Monitor/Sequencer.
Some details:
I have a monitored input on MON13 (+12.0V).
The resistor divider used at the input of MON13 is Rtop = 4.99K / Rbot = 1.0K (Vout Scale set to 0.166).
I have set the under-voltage WARN and over voltage-WARN to +/- 12.5%. I have configured GPIO14 to assert low when either the UV_WARN or OV_WARN is detected.
When I slowly lower the 12V supply (MON 13), the GPIO asserts as expected.
When I quickly remove the 12V supply (MON13), the GPIO may or may not assert at all. And when it does assert, it is at a significantly lower voltage than expected. The decay time is roughly 6V/mS.
I am power-cycling the unit while it monitors the 12V input rail. The 3.3V rail powering the UCD90160ARGCT is stable throughout most of the decay. Significantly longer than when the GPIO should assert.