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# LM5161: Pspice for TI : Simulation does not converge, An isolated high side floating gate driver

Part Number: LM5161
Other Parts Discussed in Thread: UCC5350, CSD19532Q5B,

Hello TI,

I am trying to simulate an isolated high side floating gate driver   using LM5161 , TPS7A2601,  UCC5350 and CSD19532Q5B Mosfet combination. I am trying to confirm this design works.

However simulation always gave me convergence problem. I tried many thing but could not get over it.

Any help appriciated.

Dsn and output file attached.

I am using Pspice for TI 17-04-2020 S004 Win SPB 64 bit.

PArt of error:

WARNING(ORPSIM-15452): Pulse Period < (Rise Time + Fall Time + Pulse Width) for V_V10.
Reducing minimum delta to make the circuit converge.
Reducing minimum delta to make the circuit converge.
Reducing minimum delta to make the circuit converge.
Reducing minimum delta to make the circuit converge.
Reducing minimum delta to make the circuit converge.

ERROR(ORPSIM-15138): Convergence problem in Transient Analysis at Time = 210.0E-06.
Time step = 270.6E-21, minimum allowable step size = 1.000E-18

These supply currents failed to converge:

I(X_U2.E_E36) = 1.077mA \ 697.04uA
I(X_U3.E_U1_E12) = 1.249mA \ -2.785mA
I(V_V8) = -429.28pA \ -422.01pA
I(V_V10) = -1.883A \ 203.13mA
I(X_U1.V_U4_V86) = -8.821pA \ -33.01pA
I(X_X2.xcgd.v1) = 0A \ 7.276pA
I(X_X2.xcgs.v1) = 0A \ 7.276pA
I(X_X2.xcds.v1) = 0A \ 7.276pA

All the bests,

OutputFile.txt
```
**** 02/20/21 01:26:12 ******* PSpice 17.4.0 (Nov 2018) ******* ID# 0 ********

** Profile: "SCHEMATIC1-gate_driver_isolated"  [ d:\_ti_projs\ucc5350_floating_gatedriver\isolated_gate_driver_ucc5350-pspicefiles\s

****     CIRCUIT DESCRIPTION

******************************************************************************

** Creating circuit file "gate_driver_isolated.cir"
** WARNING: THIS AUTOMATICALLY GENERATED FILE MAY BE OVERWRITTEN BY SUBSEQUENT SIMULATIONS

*Libraries:
* Profile Libraries :
* Local Libraries :
* From [PSPICE NETLIST] section of D:\_TI_projs\cdssetup\OrCAD_PSpiceTIPSpice_Install\17.4.0\PSpice.ini file:
.lib "nom_pspti.lib"
.lib "nom.lib"

*Analysis directives:
.TRAN  0 0.036 0.0 0.001 SKIPBP
.PROBE64 I(R_R4)
.PROBE64 I(R_R2)
.INC "..\SCHEMATIC1.net"

**** INCLUDING SCHEMATIC1.net ****
* source ISOLATED_GATE_DRIVER_UCC5350
X_U1         N14903 N14907 N18996 N17075 N16148 N17933 N16148 N14868 N15477
+  N15477 0 0 0 N19336 N22285 LM5161_TRANS PARAMS: SS=0
X_TX1    N15477 N15530 GND_SIGNAL N18256 SCHEMATIC1_TX1
C_C1         0 N14868  10u  TC=0,0
C_C2         0 N14868  470n  TC=0,0
R_R1         N14868 N14903  402k TC=0,0
R_R2         N14907 N14868  100k TC=0,0
R_R3         0 N14907  5k TC=0,0
C_C3         0 N17075  22n  TC=0,0
C_C4         N15477 N17933  10n  TC=0,0
R_R4         N15477 N15484  100k TC=0,0
C_C5         N15484 N18996  100n  TC=0,0
C_C6         N15484 N15530  1n  TC=0,0
D_D1         N15530 N16148 Dbreak
C_C8         N15530 0  10u  TC=0,0
C_C9         N15530 0  1u  TC=0,0
R_R6         N18996 N15530  13.7k TC=0,0
R_R7         0 N18996  2k TC=0,0
C_C7         N16148 0  100n  TC=0,0
C_C10         GND_SIGNAL N17625  10u  TC=0,0
D_D2         N18256 N17625 Dbreak
R_R13         0 N19336  20000k TC=0,0
R_R14         N22285 0  20000k TC=0,0
X_U2         N24418 0 N25027 0 N24422 N37449 N24335 GND_SIGNAL UCC5350MCD_TRANS
R_R17         N24422 N24418  1 TC=0,0
V_V3         N25027 0
+PULSE 0 3 30m 40n 80n 1000m 1100m
C_C11         GND_SIGNAL N24335  1u  TC=0,0
C_C14         GND_SIGNAL N17625  1u  TC=0,0
V_V5         N37449 0 3Vdc
C_C12         N37449 0  1u  TC=0,0
C_C13         N37449 0  470n  TC=0,0
M_M2         N15530 N39962 N399540 N399540 MbreakN
R_R23         0 N399540  15 TC=0,0
V_V7         N39962 0
+PULSE 0 25 30.5m 10n 10n 100m 100m
X_U3         N17625 N42909 GND_SIGNAL N43945 N17625 N24335 TPS7A2601_TRANS
C_C15         N24335 GND_SIGNAL  10u  TC=0,0
C_C16         N24335 GND_SIGNAL  1u  TC=0,0
R_R24         N42909 N24335  1100k TC=0,0
R_R25         GND_SIGNAL N42909  100k TC=0,0
R_R26         N24335 N43945  1100k TC=0,0
X_X2         N47591 N24418 GND_SIGNAL CSD19532Q5B
R_R21         GND_SIGNAL N47715  10 TC=0,0
V_V9         N47715 0 42
R_R27         N47591 N47603  0.001 TC=0,0
V_V8         N47603 0 60
V_V10         N14868 0
+PULSE 0 40 0 1000u 1000u 100m 100m

.subckt SCHEMATIC1_TX1 1 2 3 4
K_TX1         L1_TX1 L2_TX1 1
L1_TX1         1 2 100uH
L2_TX1         3 4 100uH
.ends SCHEMATIC1_TX1

**** RESUMING gate_driver_isolated.cir ****
.END

INFO(ORPSIM-15453): Model X_X2.NMOS: Using BSIM VERSION 3.2

**** 02/20/21 01:26:12 ******* PSpice 17.4.0 (Nov 2018) ******* ID# 0 ********

** Profile: "SCHEMATIC1-gate_driver_isolated"  [ d:\_ti_projs\ucc5350_floating_gatedriver\isolated_gate_driver_ucc5350-pspicefiles\s

****     Diode MODEL PARAMETERS

******************************************************************************

X_X2.DBD        X_U2.X_U3.dd    X_U2.X_U55.dd   X_U2.X_U10.dd
T_Measured   25
T_Current   27
IS    5.000000E-12   10.000000E-15   10.000000E-15   10.000000E-15
N    1.045           1.000000E-03    1.000000E-03    2.3
BV  101
RS  750.000000E-06
TT    2.000000E-09
CJO    1.000000E-18
VJ     .5
M     .625
XTI    3.3
TRS1    4.000000E-03

X_U2.X_U57.dd   X_U2.X_U11.dd   X_U2.X_U5.dd    X_U2.X_U9.dd
IS   10.000000E-15   10.000000E-15   10.000000E-15   10.000000E-15
N    1.000000E-03    1.000000E-03                    2.3

X_U2.X_U8.dd    X_U2.X_U30.d_d1 X_U2.X_U4.dd    X_U2.X_U60.dd
IS   10.000000E-15    1.000000E-15   10.000000E-15   10.000000E-15
N                     .1             1.6             1.000000E-03
RS                     .05
TT                   10.000000E-12

X_U2.X_U56.dd   X_U3.X_U1_U20.dd1
IS   10.000000E-15    1.000000E-15
N    1.000000E-03     .1
RS                     .05
TT                   10.000000E-12

X_U3.X_U1_U11.dd1
IS    1.000000E-15
N     .1
RS     .05
TT   10.000000E-12

**** 02/20/21 01:26:12 ******* PSpice 17.4.0 (Nov 2018) ******* ID# 0 ********

** Profile: "SCHEMATIC1-gate_driver_isolated"  [ d:\_ti_projs\ucc5350_floating_gatedriver\isolated_gate_driver_ucc5350-pspicefiles\s

****     MOSFET MODEL PARAMETERS

******************************************************************************

MbreakN         X_X2.NMOS       X_U2.X_M14._mod X_U2.X_M16._mod
NMOS            NMOS            NMOS            PMOS
T_Measured                   25
T_Current                   27
LEVEL    1               7               1               1
L  100.000000E-06  100.000000E-06   10.000000E-09   10.000000E-09
W  100.000000E-06  100.000000E-06    1.8              .107
VTO    0                .7              .2             -.2
KP   20.000000E-06   51.797160E-06    8.080000E-09    2.000000E-09
GAMMA    0               0               0               0
PHI     .6                              .6              .6
LAMBDA    0               0               0               0
IS   10.000000E-15    1.000000E-15   10.000000E-15   10.000000E-15
JS    0               0               0               0
N                                    2.5             2.5
PB     .8             1                .8              .8
PBSW     .8             1                .8              .8
CJ    0               1.000000E-18    0               0
CJSW    0               1.000000E-18    0               0
CGSO    0               1.000000E-18    0               0
CGDO    0               1.000000E-18    0               0
CGBO    0               1.000000E-18    0               0
NSUB                   10.000000E+15
TOX    0              40.000000E-09    0               0
XJ    0             300.000000E-09    0               0
UCRIT   10.000000E+03   10.000000E+03   10.000000E+03   10.000000E+03
DELTA                     .022
DIOMOD    1               2               1               1
VFB    0              -1               0               0
LETA    0               0               0               0
WETA    0               0               0               0
U0    0             650               0               0
TEMP    0                               0               0
VDD    5                               5               5
XPART    0               0               0               0
UA                    1.400000E-09
UB                    5.000000E-18
UC                  -46.500000E-12
VSAT                   80.000000E+03
RDSW                    0
VOFF                    -.37
NFACTOR                    2
PCLM                     .25
PDIBL1                     .02
PDIBL2                    4.000000E-03
DROUT                     .9
PSCBE1                  300.000000E+06
PSCBE2                    1.000000E-06
A0                    1
A1                    0
A2                    1
NPEAK                  148.500000E+15
VBM                   -5
LDD                    0
LITL                  189.736700E-09
KT1                   -1.1
UA1                   25.000000E-12
UB1                 -800.000000E-21
UC1                  -56.000000E-12
PVAG                     .1
ETA0                    5.000000E-03
KT1L                    1.000000E-15
DSUB                    1.4
MOBMOD                    1
PRWG                    0
LINT                   55.000000E-09
DLC                   55.000000E-09
DWC                    0
CF                    0
NOIA                  100.000000E+18
NOIB                   50.000000E+03
NOIC                   -1.400000E-12
VTM                     .025692
VERSION                    3.2
PBSWG                    1
MJSWG                     .33
CJSWG                    1.000000E-18
JTSCD                    0
TOXM                   40.000000E-09
LLC                    0
LWC                    0
LWLC                    0
WLC                    0
WWC                    0
WWLC                    0

X_U2.X_M13._mod X_U2.X_M15._mod
NMOS            NMOS
LEVEL    1               1
L   10.000000E-09   10.000000E-09
W     .5              .5
VTO     .2              .2
KP    9.600000E-09    9.600000E-09
GAMMA    0               0
PHI     .6              .6
LAMBDA    0               0
IS   10.000000E-15   10.000000E-15
JS    0               0
N    2.5             2.5
PB     .8              .8
PBSW     .8              .8
CJ    0               0
CJSW    0               0
CGSO    0               0
CGDO    0               0
CGBO    0               0
TOX    0               0
XJ    0               0
UCRIT   10.000000E+03   10.000000E+03
DIOMOD    1               1
VFB    0               0
LETA    0               0
WETA    0               0
U0    0               0
TEMP    0               0
VDD    5               5
XPART    0               0

**** 02/20/21 01:26:12 ******* PSpice 17.4.0 (Nov 2018) ******* ID# 0 ********

** Profile: "SCHEMATIC1-gate_driver_isolated"  [ d:\_ti_projs\ucc5350_floating_gatedriver\isolated_gate_driver_ucc5350-pspicefiles\s

****     Resistor MODEL PARAMETERS

******************************************************************************

X_X2.RTEMP
R    1
TC1    8.000000E-03
TC2   25.000000E-06

**** 02/20/21 01:26:12 ******* PSpice 17.4.0 (Nov 2018) ******* ID# 0 ********

** Profile: "SCHEMATIC1-gate_driver_isolated"  [ d:\_ti_projs\ucc5350_floating_gatedriver\isolated_gate_driver_ucc5350-pspicefiles\s

****     Voltage Controlled Switch MODEL PARAMETERS

******************************************************************************

X_U2.X_S1._S1   X_U2.X_S2._S2   X_U3.X_S2._S2   X_U3.X_S4._S4
RON    1               1                .1             1.000000E-03
ROFF  100.000000E+06  100.000000E+06  100.000000E+03    1.000000E+09
VON     .6              .6              .8             0
VOFF     .4              .4             0               1

X_U3.X_S3._S3   X_U3.X_S1._S1
RON    1.000000E-03  100.000000E-06
ROFF    1.000000E+09    1.000000E+09
VON    1               1
VOFF     .2              .2

WARNING(ORPSIM-15452): Pulse Period < (Rise Time + Fall Time + Pulse Width) for V_V10.

WARNING(ORPSIM-15452): Pulse Period < (Rise Time + Fall Time + Pulse Width) for V_V10.
Reducing minimum delta to make the circuit converge.
Reducing minimum delta to make the circuit converge.
Reducing minimum delta to make the circuit converge.
Reducing minimum delta to make the circuit converge.
Reducing minimum delta to make the circuit converge.

ERROR(ORPSIM-15138): Convergence problem in Transient Analysis at Time =  210.0E-06.
Time step =  270.6E-21, minimum allowable step size =  1.000E-18

These supply currents failed to converge:

I(X_U2.E_E36)             =    1.077mA  \   697.04uA
I(X_U3.E_U1_E12)          =    1.249mA  \   -2.785mA
I(V_V8)                   =  -429.28pA  \  -422.01pA
I(V_V10)                  =    -1.883A  \   203.13mA
I(X_U1.V_U4_V86)          =   -8.821pA  \   -33.01pA
I(X_X2.xcgd.v1)           =         0A  \    7.276pA
I(X_X2.xcgs.v1)           =         0A  \    7.276pA
I(X_X2.xcds.v1)           =         0A  \    7.276pA

Last node voltages tried were:

NODE   VOLTAGE     NODE   VOLTAGE     NODE   VOLTAGE     NODE   VOLTAGE

(N14868)    8.4001 (N14903)    2.1698 (N14907)     .4000 (N15477) 1.593E-06

(N15484) 253.7E-09 (N15530) 1.584E-06 (N16148) 1.211E-09 (N17075) 2.836E-15

(N17625)     .8553 (N17933) 1.593E-06 (N18256)     .8554 (N18996) 226.8E-09

(N19336)    0.0000 (N22285)    0.0000 (N24335)     .0041 (N24418)     .8547

(N24422)     .8545 (N25027)    0.0000 (N37449)    3.0000 (N39962)    0.0000

(N42909)     .7838 (N43945)     .2000 (N47591)   60.0000 (N47603)   60.0000

(N47715)   42.0000 (X_X2.4)   60.0000 (X_X2.5)     .8548 (X_X2.6)     .8554

(X_X2.7)   60.0000 (X_X2.8)     .8554 (X_X2.9)     .8554 (N399540) 32.94E-18

(X_U1.EN)    0.0000                   (X_U1.QB)    1.0000

(X_U1.QD)    0.0000                   (X_X2.10)   60.0000

(X_X2.11)     .8547                   (X_X2.12)     .8554

(X_U1.CON) 3.100E-09                  (X_U1.QBD)    1.0000

(X_U2.ASD)    1.0000                  (X_U3.PG2)    0.0000

(X_U3.VXX)     .8556                  (X_U3.VYY)     .8556

(X_U3.VZZ)     .8556                  (X_U1.ILIM)    0.0000

(X_U1.LS_G)    1.0000                 (X_U1.SET3)    0.0000

(X_U1.U2_Q)    0.0000                 (X_U1.VREF) 2.836E-15

(X_U3.VINT)     .8554                 (GND_SIGNAL)     .8554

(X_U1.CLAMP)    2.0000                (X_U2.UVLO1)    1.0000

(X_U2.UVLO2)    0.0000                (X_U3.DISCH)    0.0000

(X_U3.EN_OK)    0.0000                (X_U3.ROUT1)     .0060

(X_U3.VOUT1)    -.8512                (X_U3.V_FBK)    -.0715

(X_U1.U1_PSM)    0.0000               (X_U1.U2_SET)    0.0000

(X_U2.GATE_N)     .8545               (X_U2.GATE_P)     .0041

(X_U2.INN_OK)    1.0000               (X_U2.INP_OK)    0.0000

(X_U2.X_U6.1)    1.0000               (X_U2.X_U7.1)    0.0000

(X_U3.EN_INT)-47.67E-06               (X_U3.EN_OK1)    0.0000

(X_U3.X_X1.6)     .8556               (X_X2.xcds.5)   59.1450

(X_X2.xcds.6) 545.4E-12               (X_X2.xcds.7)    0.0000

(X_X2.xcds.8)    0.0000               (X_X2.xcgd.5)   59.1450

(X_X2.xcgd.6) 14.70E-12               (X_X2.xcgd.7)    0.0000

(X_X2.xcgd.8)    0.0000               (X_X2.xcgs.5)   59.1450

(X_X2.xcgs.6) 1.550E-09               (X_X2.xcgs.7)    0.0000

(X_X2.xcgs.8)    0.0000               (X_U1.U2_Q_ND)    0.0000

(X_U1.U3_COFF) 20.01E-06              (X_U1.U3_TOFF)    0.0000

(X_U1.U4_SHDN)     .4955              (X_U2.INN_INT)    0.0000

(X_U2.INP_INT)    0.0000              (X_U2.UVLO_OK)    0.0000

(X_U3.DISCH_B)    1.0000              (X_U3.N430125)    0.0000

(X_U3.N430233)     .8556              (X_U3.N430319)     .7199

(X_U3.N430701)    0.0000              (X_U3.N431153)     .8556

(X_U3.N431299)     .8556              (X_U3.N431415) 100.0E-06

(X_U3.N448013) 219.1E-06              (X_U3.N523713) 219.1E-06

(X_U3.N652534)    1.1530              (X_U3.N658624)     .2000

(X_U3.N664581)     .0372              (X_U3.N682208) 851.5E-12

(X_U3.PREVOUT)     .0041              (X_U3.U1_DROP)     .0920

(X_U3.VIN_INT)-47.67E-06              (X_U3.Vzz_INT) 219.1E-06

(X_U3.X_U17.1)    0.0000              (X_U1.U2_QB_ND)    1.0000

(X_U1.U2_RESET)    0.0000             (X_U2.CLAMP_TH)    1.0000

(X_U2.DRVA_MOD)    0.0000             (X_U2.INPUT_OK)    0.0000

(X_U2.VCC1_INT)    3.0000             (X_U2.VCC2_INT)    -.8513

(X_U2.X_U676.1)    0.0000             (X_U2.X_U677.1)    0.0000

(X_U3.N1078460)    0.0000             (X_U3.N1078548)-34.54E-09

(X_U3.N1111214) 851.5E-12             (X_U3.N1112560)    0.0000

(X_U3.U1_EN_IH)     .9000             (X_U1.COFF_ILIM) 41.58E-06

(X_U1.ISENSE_LS)-8.384E-06            (X_U1.N16822551)    1.0000

(X_U1.U1_ISENSE) 8.400E-06            (X_U1.U1_QISINK)    0.0000

(X_U1.U3_FBCOMP)    0.0000            (X_U1.U4_VIN_EN)    1.0000

(X_U2.INPUT_DEL)    0.0000            (X_U2.N16669580)    0.0000

(X_U2.N16669982)    0.0000            (X_U2.N16672528)    0.0000

(X_U2.N16781655)   12.0000            (X_U2.N16789976)    2.7000

(X_U2.N16816719)    2.1000            (X_U2.N16832250)    0.0000

(X_U2.N16839246)    1.2000            (X_U2.N16850890)    2.1000

(X_U2.N16850947)    1.0000            (X_U2.N16851003)    1.2000

(X_U2.N16855073)    0.0000            (X_U2.N17027842)    0.0000

(X_U2.N17110019)    0.0000            (X_U2.N17112053)    0.0000

(X_U2.N17113570)    0.0000            (X_U2.N17147754)    2.8554

(X_U2.N17157839)    1.0000            (X_U2.N17180339)     .8545

(X_U2.N17180405)     .0041            (X_U2.N17358601)     .8545

(X_U2.N17450859)     .8547            (X_U2.X_U30.my5)    1.0000

(X_U2.X_U30.qbr)    1.0000            (X_U2.X_U30.qqq)    -.1393

(X_U2.X_U6.INM1)    -.3000            (X_U2.X_U6.INP1)    0.0000

(X_U2.X_U6.INP2)     .2000            (X_U2.X_U7.INM1)   12.8510

(X_U2.X_U7.INP1)    0.0000            (X_U2.X_U7.INP2)    0.0000

(X_U3.U1_EN_HYS)     .5000            (X_U3.U1_VIN_OK)    0.0000

(X_U1.U3_VREF_RR) 107.0E-09           (X_U2.CLAMP_SIGB)    0.0000

(X_U2.X_U17.YINT)    0.0000           (X_U2.X_U18.YINT)    1.0000

(X_U2.X_U19.YINT)    0.0000           (X_U2.X_U20.YINT)    0.0000

(X_U2.X_U26.YINT)    1.0000           (X_U2.X_U30.qint)    -.1393

(X_U3.U1_VREF_SS) 189.4E-12           (X_U3.X_U17.INM1)     .3692

(X_U3.X_U17.INP1)    0.0000           (X_U3.X_U17.INP2)    0.0000

(X_U3.X_U1_U16.1)    0.0000           (X_U3.X_U1_U17.1)    0.0000

(X_U3.X_U4.YINT1)    0.0000           (X_U3.X_U4.YINT2)    0.0000

(X_U3.X_U4.YINT3)    1.0000           (X_U1.X_U1_U616.1)    0.0000

(X_U2.X_U30.myvss)    0.0000          (X_U2.X_U30.qqqd1)    0.0000

(X_U2.X_U676.INM1)    2.1000          (X_U2.X_U676.INP1)    0.0000

(X_U2.X_U676.INP2)    0.0000          (X_U2.X_U677.INM1)    2.1000

(X_U2.X_U677.INP1)    0.0000          (X_U2.X_U677.INP2)    0.0000

(X_U2.X_U678.Yint)    1.0000          (X_U1.U1_N16776085)    0.0000

(X_U1.U1_N16776383)    8.4001         (X_U1.U1_N16776519)    0.0000

(X_U1.U1_N16776659)    1.0000         (X_U1.U1_N16776683)    1.0000

(X_U1.U1_N16776729)    0.0000         (X_U1.U1_N16791512) 8.400E-06

(X_U1.U1_N16804692)    1.6000         (X_U1.U1_N16809401)    2.9900

(X_U1.U1_N16809741)    2.0000         (X_U1.U1_N16810788)    0.0000

(X_U1.U1_N16817941)    1.0000         (X_U1.U1_N16820806)    1.0000

(X_U1.U1_N16821918)    -.0100         (X_U1.U1_N16821958)   -3.4000

(X_U1.U1_N16822787)    -.0100         (X_U1.U2_N16755126)    1.0000

(X_U1.U3_N16744464) 20.01E-06         (X_U1.U3_N16746684)-3.358E-18

(X_U1.U3_N16763426) 1.845E-06         (X_U1.U3_N16763446)    1.0000

(X_U1.U3_N16763508)    2.0000         (X_U1.U3_N16763538)    1.0000

(X_U1.U3_N16763566) 1.840E-06         (X_U1.U4_N16747027)    4.0000

(X_U1.U4_N16747033)    1.0000         (X_U1.U4_N16747121)    1.2500

(X_U1.U4_N16747127)    0.0000         (X_U1.U4_N16747163)    0.0000

(X_U1.U4_N16747195)    5.0000         (X_U1.U4_N16751419)    4.4000

(X_U1.U4_N16782096) 10.65E-06         (X_U1.U4_N16789606)     .4000

(X_U1.U5_N16751216)    2.0200         (X_U1.U5_N16751262)    2.1698

(X_U1.U5_N16765173)    2.3000         (X_U1.X_U1_U7.YINT)    1.0000

(X_U1.X_U2_U6.YINT)    1.0000         (X_U1.X_U2_U8.YINT)    1.0000

(X_U1.X_U2_U9.YINT)    0.0000         (X_U1.X_U3_U1.YINT)    0.0000

(X_U1.X_U3_U2.Yint) 3.136E-15         (X_U1.X_U3_U3.YINT)    0.0000

(X_U1.X_U3_U4.YINT)    1.0000         (X_U1.X_U3_U5.YINT)    1.0000

(X_U1.X_U4_U5.Yint)    1.0000         (X_U1.X_U4_U7.Yint)    1.0000

(X_U2.GATEUPPERMOS)    0.0000         (X_U3.U1_N16777354)    2.1500

(X_U3.U1_N16777400) 2.254E-09         (X_U3.U1_N16777525) 2.254E-09

(X_U3.U1_N16777592)    0.0000         (X_U3.U1_N16777602)    1.1498

(X_U3.U1_N16782898)     .0700         (X_U3.U1_N16803016)    0.0000

(X_U3.U1_PRE_EN_OK)    0.0000         (X_U1.U1_N167759170)    2.0000

(X_U1.U1_N167759390)    0.0000        (X_U1.U4_N167841540)    7.5000

(X_U1.X_U1_U631.my5)    1.0000        (X_U1.X_U1_U631.qbr)    1.0000

(X_U1.X_U1_U631.qqq) 210.2E-09        (X_U1.X_U2_U10.YINT)    1.0000

(X_U1.X_U2_U11.YINT)    0.0000        (X_U1.X_U2_U12.YINT)    0.0000

(X_U2.GATE_CLAMPMOS)     .8554        (X_U2.GATE_LOWERMOS)     .8554

(X_U2.UVLO1_DELAYED)     .9878        (X_U2.UVLO2_DELAYED)-2.139E-27

(X_U2.X_U30.x3.YINT)    0.0000        (X_U3.X_U1_U16.INM1)    2.1500

(X_U3.X_U1_U16.INP1)    0.0000        (X_U3.X_U1_U16.INP2)    0.0000

(X_U3.X_U1_U17.INM1)     .9000        (X_U3.X_U1_U17.INP1)    0.0000

(X_U3.X_U1_U17.INP2)    0.0000        (X_U3.X_U1_U19.YINT)    0.0000

(X_U1.X_U1_U603.YINT)    1.0000       (X_U1.X_U1_U616.INM1)    2.9900

(X_U1.X_U1_U616.INP1)    0.0000       (X_U1.X_U1_U616.INP2)    0.0000

(X_U1.X_U1_U629.YINT)    1.0000       (X_U1.X_U1_U630.Yint)    0.0000

(X_U1.X_U1_U631.qint) 210.2E-09       (X_U1.X_U1_U632.Yint)    0.0000

(X_U1.X_U4_U606.Yint)    0.0000       (X_U1.X_U4_U607.YINT)    0.0000

(X_U1.X_U4_U609.YINT)    0.0000       (X_U1.X_U4_U610.Yint)    1.0000

(X_U1.X_U1_U631.myvss)    0.0000      (X_U1.X_U1_U631.qqqd1)    0.0000

(X_U1.X_U1_U631.x3.YINT)    0.0000

**** Interrupt ****
```