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TPS62135: Understanding the Power Good control logic

Peter Davis1
Intellectual 400 points
Part Number: TPS62135

Hi are using the TPS62135 in our custom board, and wanted to confirm how the PG control behaves with respect to fast transients on the output voltage?
The data sheet specifies these thresholds for Power good:

Does this mean that at worst case on IC the power good will fail if VFB exceeds -3%/+2% of the 0.7V level due to a transient condition?
Is there a trip time constant where the voltage must be exceeded for a certain duration prior to Power good being pulled low?
Is there any debounce protection on the power good line?
Can you provide input on what this PG Control block does in more detail?

  • 0
    TI__Mastermind 21765 points

    The images did not come through. But, based on DS spec, PG will go high when Vout rises to 98% worst case.  From wherever the actual threshold level is, there will be at least 3% of hysteresis as is mentioned in the falling % VOUT row. So, 98-3 = 95% worst case when PG will go low. The DS does not suggest any other mechanism like debounce protection and trip time constant being used.

    Thanks,

    Amod