UCC28631: VSENSE Open Pin Fault Startup Issue

Any update on this? All the remaining testing and development progress is on hold since the supply is not starting up. 

Hello, Mustafa,

Thanks for your interesting in TI's part.

Yes, you are right, if Ra//Rb equivalent resistance is out of 10k~20k range , the controller will VSENSE pin open or short , then results in a protection.  It indicates that probably your transformer turn ratios is extreme chosen . if you don't want to change it temporary . you can reduce Ra ,then re-calculate Rb .to meet 10-20k range . the side effect of this is AC ON (brown-in) and AC OFF (brown out) point will be decreased . If this is acceptable by your spec. it's OK to reduce Ra and Rb.

Thanks.

Thanks for the response. How do we know how much ACon and ACoff are going to decrease? We need to know this to determine if it is acceptable or not. Is it going to scale linearly according to Ra change? Section 8.3.2 of the datasheet describes the UVLO, and it seems to us as long as the Rb/(Rb+Ra) ratio doesn't change, then it should not really affect ACon and ACoff. We may be missing something here, and we appreciate it if you can elaborate. Thanks!

Hi Mustafa,

Unfortunately , the ACon/off voltage calculation equation are not listed in the datasheet , I also don't know the exactly voltage. but based on other device design block . ACon/off voltage related to turn ratios of Nb/Np and Ra value . so once turn ratios of Nbp is fixed , the ACon/off voltage should be proportional to Ra value .and you have the board , so you can test the voltage on the board. Fixed ratio of Rb/Ra+Rb means output regulation voltage will not impacted.

Thanks.

Hi Mustafa,

Unfortunately , the ACon/off voltage calculation equation are not listed in the datasheet , I also don't know the exactly voltage. but based on other device design block . ACon/off voltage related to turn ratios of Nb/Np and Ra value . so once turn ratios of Nbp is fixed , the ACon/off voltage should be proportional to Ra value .and you have the board , so you can test the voltage on the board. Fixed ratio of Rb/Ra+Rb means output regulation voltage will not impacted.

Thanks.

Hello Jaden,

So we conducted few tests to resolve this issue, but unfortunately, we are still not able to get the supply to turn on. Based on the previous thread, we went ahead and changed Ra to 30.1k and Rb to 57.6k. This brings Ra//Rb to below 20k while still achieving our desired output voltage. We applied those changes to our board and measured around 19.7k btw the VSENSE pin and ground. However, the supply did not turn on, and we did not get any gate drive pulses like we have been experiencing before. 

To gather more information, we decide to buy the UCC2860EVM. We were able to get the EVM to turn on out of the box. We then made some modifications to the EVM to bring its schematic closer to our design. These modifications are:

1. Changed the power transformer to our custom transformer.
2. Changed Vsense resistors (R7 and R8) to 30.1k and 57.6k.
3. Changed Current sense resisted (R16) to 430mOhm.
4. Reduced the input and output electrolytic caps (C5, C7, C11, and C12) to match our design.

After making all these changes, we can get the supply to turn on using our transformer design, and we got 19.5V on the output at 120V input. In addition, the regulation was pretty good across our load range. We did notice the lower ACon threshold (~65V vs. 85V), but that is okay for us. It was comforting to see the EVM work properly, but we still can't get our custom board to work. To be sure that this is not a one-off issue, we made the Ra and Rb modifications to a couple of rivieh boards, and none have worked.

Since we know the EVM schematic work we compared it closely against our schematic, and we see these variations:

1. The EVM uses UCC28630. We use UCC28631.
2. The EVM places a 10pF between Vsense and gnd. We do not have this cap.
3. The EVM uses a turn-on gate resistance of 47ohm and a turn-off resistance of 4.7ohm. We use 4.7ohm for both turn-on and turn-off.
4. The EVM places a 100kOhm (R15) between the gate and the source of the FET. We have the same resistance but placed between the gate and gnd. 

Can you please comment if you think any of those deviations explain the behavior we are getting. Happy to share the full schematic and PCB design if we can convert this thread to private. We greatly appreciate the assistance as we do not know what else we can do on our end. We have been on a holding pattern for some time now, and this issue is becoming a critical path for our product development timeline.

Thank you,

Mustafa

Any update on this?

Hi Mustafa,

Could you please send your schematic and PCB layout file to me by below E-mail address:

jaden-ning@ti.com.

Thanks.