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LP87521-Q1: Couple EN and PGOOD PIN

Part Number: LP87521-Q1

Hello Team,

My customer is using the LP87521-Q1 in a 4phase one output setting that is enabled by the EN pin.

We've notice that when the EN pin is pulled down the Pgood output stays high so I have a few questions:

1. Is there a register write that we can do on startup to couple the EN and PGOOD pin so when EN drops so does PGOOD

2. In OTP settings is it an option to couple the EN and PGOOD pin?

Thanks for the help,

David

  • Hi David,

    By design, this device PGOOD output is not actively pulled low when enable is pin is set to low. This allows connecting PGOOD signals from various devices together when open-drain outputs are used. This is also explained in detail in the device datasheet, Power-Good Information section.

    EN pin status does not go to PGOOD block internally and hence there is no option to pull the PGOOD to low automatically when EN pin goes low. But PGOOD pin can be connected externally to one of the GPIO's (which is controlled by EN1 pin) to pull the PGOOD low when EN1 goes low. If you have the exact part number for the device customer is using, we can look at its TRM (available on ti.com for catalog devices) to see how other two GPIO's are configured in the OTP. Or it can also be configured through I2C interface.

    Regards,

    Murthy