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TPS53647: OCL protection when only one phase current goes high

user4811888
Intellectual 530 points
Part Number: TPS53647

Hi TI,

Although this device has current balance circuits, but as you know current can not be fully balanced without any error. If, one of four phases has higher current than other three, and only this phase meets OCL condition, how could OCL protection behave?

In datasheet, it claims next on pulses will be delayed. If phase 1 OCL happens(CSP1 >OCL_threshold), will it prevent phase 2/3/4 PWM firing? 

  • 0
    TI__Genius 11095 points

    Hello,

    The OCL protection itself only limits the current in any one phase to the chosen OCL limit.

    • If this is happens only for short time during a transient etc... then the converter will continue regulating normally. Cycle by cycle limiting is not in itself indicative of a catastrophic fault.
    • If it persists for longer, the IOUT_OC_FAULT limit will likely trigger based on the total sum current, but this is slower because it's ADC based.
    • If the overcurrent condition is very severe (e.g. like a short circuit), then the output voltage will fall and trip the UVP protection which is fast, like 2us. This is because OCL of each phase will limit the total output current of the converter. If the load (or short ckt...) demands more than this limit, the voltage will go down to zero, and trip UVP. 

    Hope it makes sense. 

  • 0 in reply to Matt Schurmann
    Intellectual 530 points

    hello,

    Thank you for reply, it makes sense.

    But I think there might be one more case, I see other vendor's controller has such function but not sure if TI can, that is thermal offset. Any phase current can be added with an positive/negative offset. This can cause one phase current obviously much higher than others, and can persist forever if no fault triggered. 

    OCL protection in this condition can also work with current balance at the same time, right?

  • 0 in reply to user4811888
    TI__Genius 11095 points

    Hello, the OCL limit is an absolute value for each phase, and not affected by current sharing. There is a slow loop in TPS53647 which adjusts the on-time of every phase to match their currents. But the phase current steering due to current sharing loop (e.g. some phases will have slightly longer on-time than others to compensate for PCB/inductor mismatch) does not affect the current at which TPS53647 will trigger OCL for each phase and block current to it. OCL is given higher priority than current sharing. 

  • 0 in reply to Matt Schurmann
    Intellectual 530 points

    Understood what you are saying about. Let's directly see my quick example below.

    Iout(sum current)=40A constant, each phase 10A. If phase 1 current suddenly jumps to 25A somehow(might be caused by thermal offset functions or other strange happens).

    • if OCL limit threshold is 30A, nothing would happen, just current balance loop slowly takes over to new steady state, so current would be 25A, 5A, 5A, 5A.
    • if OCL limit threshold is 20A, OCL would limit phase 1 current to 20A only. At the same time, current balance also works to tune other phases current. Do you mean that, only phase 1 would skip on pulses to keep itself at 20A, but phase 2/3/4 would still normally fire PWMs, so overall current would be 20A, 6.67A, 6.67A, 6.67A?

    Appreciate it for your kind explanations.

  • 0 in reply to user4811888
    TI__Genius 11095 points
    user4811888 said:
    if OCL limit threshold is 30A, nothing would happen, just current balance loop slowly takes over to new steady state, so current would be 25A, 5A, 5A, 5A

    Correct, power conversion would continue normally, and the Ishare loop would correct for the imbalance. 

    user4811888 said:
    • if OCL limit threshold is 20A, OCL would limit phase 1 current to 20A only. At the same time, current balance also works to tune other phases current. Do you mean that, only phase 1 would skip on pulses to keep itself at 20A, but phase 2/3/4 would still normally fire PWMs, so overall current would be 20A, 6.67A, 6.67A, 6.67A?

    Correct. Phase 1 would skip pulses to keep itself below 20A, and the others would still fire normally as long as their current is below the threshold. Note that the loop would start firing pulses more quickly to maintain voltage regulation now, since there is one phase not passing energy, and this would naturally bring up their current, vs. the first phase. 

    Also, just want to remind you that the OCL here is Valley OCL. So, the DC current is appx 1/2 Iripple higher. 

  • 0 in reply to Matt Schurmann
    Intellectual 530 points

    Got it, thank you schurmann.