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UCC28063: UCC28063 startup drive waveform is messy

Part Number: UCC28063

Our company has encountered some technical problems in the application of UCC28063 chip, and we need help to solve them. Please help to arrange the time

The existing project is the input range of 200-480 and the output of 800W. The problem point is that the drive is chaotic for several cycles when starting up, there is a large peak current, and even it will work in CCM, which has a great impact on the power device, and it is feared that there is a potential safety risk

Related test waveforms are shown in the attached figure .Docx

4762.LM5036 debugging problems and related waveforms.docx

Attached Schematic

6303.Schematic Prints.pdf

  • Hi Gabriel,

    during start up when PFC output voltage raising, the input voltage will always have a period to be equal to PFC output voltage. At this period, there is no signal from ZCD pin, so CCM can not be avoided during start up.

    For peak current risk, the controller has Rtset to limit the max Ton time, and CS sampling to limit the peak current.

    Those are two pins to protect the system during start up. Please confirm the suitable value for these two pins.