Dear E2E Design Support,
Using the open-drain version of this voltage supervisor chip, can I assume the RESET pin high-impedance when the chip is not powered? As for the background of my question, in my application it is a valid possible scenario, that the voltage rail where the RESET pin is pulled up is already up and running. while the TPS3840 is not powered. In this case there is no current allowed to flow so I need the RESET pin in high impedance, or I have to use the push-pull active high TPS3840 version with an external NFET. Please advise.
Thanks in advance: