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TPS82130: Does this design violates design spec of TPS82130 IC?

Part Number: TPS82130
Other Parts Discussed in Thread: TIDA-01405

Dear Sir/Madam,

Need technical support for TPS82130 Inverting regulator. We are using design as per TIDA-01405. See schematic below.

 

-AVSS = -1V7

At Power ON, first +5V (VIN) turns ON and then +3V3(Enable Line) turns ON.

At Shutdown, first +5V (VIN) is turned OFF to 0v and then after 100ms +3V3 @ Enable Pin is turned OFF to 0v. Please advise if this violates design spec of IC.

Best regards,

Felix

  • Hi Felix,

    Based on DS maximum ratings, EN pin can only handle VIN+0.3V. Considering EN is at 3.3V when VIN=0V, this looks like a violation of the EN pin voltage rating but we will double check on this and Nancy will reply back with further update. It would be safer to be able to change the sequence of EN/VIN during shutdown if possible.

    Thanks,

    Amod

  • hi Amod,

    Can I double confirmed on the following:

    • What is the Enable Pin Threshold voltage to turn ON & turn OFF. The datasheet indicates 0.9v minimum. This is with respect to which Pin. Because for this inverting module the IC GND Pin is now output at -1.7v.
    • During abrupt power down, If VIN = 0v and EN=3.3v for 100ms, is it ok for this device?

    Best regards,
    Felix

  • Hi Felix,

    1. For Enable, please refer to TIDA-01405 section 1.4.4 Enable pin configuration with either level shifter circuit or just tied EN to Vin.

        EN is referenced to GND pin of devise. A low level must go down to GND level. If GND pin is at -1.7V, then 3.3V becomes 5V across EN and 

        GND. 

    2. During abrupt power down, if Vin=0V and EN=3.3V for 100ms, it is not allowed for device since VEN max is Vin+0.3V. So customer needs to 

       change power sequence to EN off first and 5V off later.

    Thanks,

    Nancy