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Original question:

TPS40210: TPS40210DGQR phase margin

TPS40210: Why the electrolyte type C12 is used in attachment circuit?

Jian Xiule
Prodigy 260 points
Part Number: TPS40210
Other Parts Discussed in Thread: PMP30162

Hi 

About attachment circuit: This design is basically sepic converter with two separate inductors. Normally the resonance capacitors between the two inductors are only ceramic types. Why the electrolyte type C12 is used? I try to understand theat the current direction should be still positive, an thats why a capacitor may used for high capacitiy

tidrq09.pdf

  • 0
    TI__Guru 55765 points

    Hello Jian,

    Please let me forward this question to the appropriate person as my opinion is as well partially guessing.

    Best regards,
    Brigitte

  • 0 in reply to Brigitte
    TI__Prodigy 260 points

    Hi Brigitte, 

    Is there any update for this post?

  • 0 in reply to Jian Xiule
    TI__Guru 55765 points

    Hello Jian,

    Please excuse the delay. There should be an update soon.

    Best regards,
    Brigitte

  • 0
    TI__Expert 4725 points

    Hello Jian,

    The design you are referring (PMP30162) is a SEPIC with separated inductors. When a SEPIC has coupled inductors (therefore same inductance and 1:1 turns ratio), it can be demonstrated that the Q of the 4 poles (two couples, each of them complex conjugates), coming from the inductors and the capacitors C13...C15, is not that high and there is no need to damp it. 

    In case we use different inductor value (in order to differentiate the inductor ripples, because of high output voltage), like in this case, we have high Q in those resonant circuits. For this reason it helps reducing the peaking in the transfer function (which is difficult to get under control and creates a lot of phase rotation in the bode plot) by adding the resistor R20 in parallel to C13...C15: it will therefore damp merit factor and reduce the Q.

    Of course it is not possible to add just a resistor in parallel, because these capacitors "see" the input voltage (their average DC bias will be Vin). So, in order to avoid dissipation on R20, we have to add an electrolytic capacitor (not high quality needed, because its ESR will be in series to R20), and typically it is sufficient to have its capacitance with value range ~ 5 times to 10 time the value of the parallel of C13...C15. Since these capacitors have a value of 6.6 uF,  the optimal value will be 33 uF, but I already saw, buy analyzing the bode plot, that 22 uF was already enough.

    Best regards,

    Roberto