• State Resolved
  • Locked Locked
  • Replies 4 replies
  • Answers 2 answers
  • Subscribers 62 subscribers
  • Views 190 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

LM5110: Driver strength pulling low in shutdown mode

Raymond Carr
Prodigy 10 points
Part Number: LM5110
Other Parts Discussed in Thread: UCC27524

I need clarification on the LM5110-1M/NOPB gate driver.

The LM5110 datasheet does not mention the part’s drive strength pulling ‘Low’ when the SHDN pin is low. I’m guessing that when in shutdown mode, the  ‘low’ drive strength is probably weaker than when the part is enabled, i.e., not in shutdown. Could you please provide same clarification if possible.

Raymond

  • 0
    TI__Genius 13445 points

    Raymond,

    Thanks for your interest in our driver.

    By drive strength, I assume that you're referring to the drive voltage.

    When the SHDN is low, the IC is disabled in low power mode or in standby mode where both OUTA and OUTB are disabled and stuck low until SHDN is toggled high again as shown on Table 2 in the datasheet. During this time, the output pins are held low and will not source/sink current to charge/discharge any (capacitive) load.

    Regards,

    -Mamadou

  • 0
    Prodigy 10 points

    I was actually referring to impedance to ground but I thing you answered my question. Perhaps a bit of context may be useful. I am using the LM5110 to drive synchronous rectifier (SR) FETs in a DC/DC phase-shifted bridge forward converter, and the de-assertion of the SHDN signal to the LM5110 is a bit late, such that the LM5110 is disabled (in shutdown mode) for the first 6 or 7 switching cycles of the converter at power-up. The SR FETs see high dV/dt (drain to source) when the converter is turned-on, resulting in a voltage appearing at their gates due to Cgd and Cgs capacitance ratios of the SR FETs. I'm concerned that the gate of the SR FETs could see a voltage close to their threshold, thus turning-on and getting damaged, as a result of the LM5110 not being initially enabled and not pulling the gates low as strongly as when they are enabled. By your comment below, it would appear that this could be the case, i.e., LM5110  not discharging capacitive loads when in shutdown. Could you please comment.

  • 0 in reply to Raymond Carr
    TI__Genius 13445 points

    Raymond,

    LM110 should be pulled low when SHDN is active so the OUT pins would not be active.The UCC27524 family is also an option which is one of our latest most optimized driver. 

    With regards to the parasitic capacitance effects, there are workaround that you could implement include a gate to source resistor pulling the gate low whenever the driver is not active. You may also implement separate turn-on/off paths at the gate to have a low impedance path for the parasitic current away from the gate to prevent accidental turn-on.

    Regards,

    -Mamadou 

  • 0 in reply to Mamadou Diallo
    Prodigy 10 points

    Yes thanks indeed the LM5110 SHDN line is controlled by s/w (Tiva microcontroller) so changing the order is not a problem. I actually did a code change yesterday to this effect. I was simply looking for potential root causes for a few SR failures we've had. I cannot replicate the fault but will bringing the LM5110 out of standby prior to starting the converter will likely not cause any issues and may eliminate the problem. Thanks for your assistance.