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TPS24750: Fault indication during power up

Part Number: TPS24750

Hello,

I am using TPS24750 on a 8V-1A application. During powering up the input of the Efuse (while keeping Efuse enable pin low) the fault output of the Efuse goes low for 2 microseconds before being released again. This occurs when Vin is rising and passing around 1.9V. I have 4 similar circuits. I see this behavior constantly in one, sometimes in another and never in other 2. 

After this behavior, I am still able to enable/disable the Efuse. What can be the reason of this short fault indication? Datasheet states: "The FLTb pin does not assert if the internal MOSFET is disabled by EN, OV, overtemperature shutdown, or UVLO." Therefore I don't expect this behavior.

Oscilloscope picture:

  • Probe 1: Efuse Vin
  • Probe 2: Efuse enable pin
  • Probe 3: Efuse fault pin (pulled up to +2.5V)
  • Efuse output, IMON, TIMER pins are always at 0V during this behavior.

Condition:

  • No load connected to Efuse output.
  • Overvoltage limit set at 9.3V, power limit at 12W, current limit at 1A, trip time at 30ms.

Kind regards,

Zeki

  • Hi Zeki,

    Thanks for reaching out to us. Please could you share the schematic of the circuit which is showing this kind of anomaly constantly during power up. I would like to see how the pulled up power supply is getting connected to the FLTb pin.

  • Hi Avishek,

    Thank you for the reply. Here is the schematic:

    +2.5V pullups are always ON (when 8V is disabled/enabled etc 2.5V is still ON).

    Kind regards,

    Zeki

  • Hi Zeki,

    Thanks for sharing the schematic. TPS24750 is recommended for input voltage of 2.5 V to 18 V operation. Minimum UVLO threshold (Rising) at VCC pin is 2.2 V.

    Therefore, the device functionalities are not predictable and repeatable at input voltage less than its UVLO threshold. That's why, it is not observed in other two devices and not consistent for another device. Some internal pull-down may get activated for a very short while, which causes this anomaly at FLTb pin when input voltage is at around 1.9 V. If you face any issue above input voltage of 2.5 V, please let us know. 

  • Hi Avishek,

    Thanks for the information!

    Then is the statement in the datasheet "The FLTb pin does not assert if the internal MOSFET is disabled by EN, OV, overtemperature shutdown, or UVLO." not completely correct?

    Kind regards,

    Zeki

  • Hi Zeki,

    It generally doesn't assert. That's why it's not observed in other three devices.